Variable delay,mos,monostable pulse generating circuit

Claim 2

A variable pulse width monostable pulse-producing circuit comprising: a first transistor having input and output electrodes and a control electrode; a second transistor having input and output electrodes and a control electrode; a corresponding one of the input and output electrodes of each of said first and said second transistors being connectible to one terminal of a source of power; the corresponding other one of the input and output electrodes of said first and second transistors being connectible to the other terminal of said source of power; a first connection from the control electrode of said second transistor to one of the input and output electrodes of said first transistor; a timing circuit including a first resistor and a first capacitor in series connected from the control electrode of said first transistor to the corresponding one of the input and output electrodes of said second transistor; said first resistor being connected to the control electrode of said first transistor and to the one of said input and output electrodes of said first transistor opposite to the one of the input and output electrodes of said first transistor to which said first connection is made; said first capacitor being connected at one terminal to said first resistor at its point of connection to the control electrode of said first transistor and at its second terminal to the output electrode of said second transistor; said first transistor having a conducting and a nonconducting state corresponding to the voltage on its control electrode and being in the nonconducting state during the nonpulse-producing condition; said second transistor having a conducting and a nonconducting state corresponding to the voltage on its control electrode and being in a conducting state during the nonpulse-producing condition; first means having conducting and nonconducting states, in response to a level of applied voltage, connected in one circuit with said corresponding one of the input and output electrodes of said second transistor and the source of power to which said corresponding electrode is connectible for preventing conduction in said circuit of said second transistor during said nonpulse-producing condition and for creating a voltage responsive threshold voltage during said pulseproducing condition; second means for initiating conduction of said first transistor and thereby effecting a nonconducting state of said second transistor; and third means for initiating a conducting state of said first means in response to said level of applied voltage for energIzing said timing circuit with said voltage responsive threshold voltage and thereby controlling the time of conduction of said first transistor.

Claim 3

A variable pulse width monostable pulse-producing circuit comprising: a first transistor having input and output electrodes and a control electrode; a second transistor having input and output electrodes and a control electrode; a corresponding one of the input and output electrodes of each of said first and said second transistors being connectible to one terminal of a source of power; the corresponding other one of the input and output electrodes of said first and second transistors being connectible to the other terminal of said source of power; a first connection from the control electrode of said second transistor to one of the input and output electrodes of said first transistor; a timing circuit including a first resistor and a first capacitor in series connected from the control electrode of said first transistor to the corresponding one of the input and output electrodes of said second transistor; said first resistor being connected to the control electrode of said first transistor and to the one of said input and output electrodes of said first transistor opposite to the one of the input and output electrodes of said first transistor to which said first connection is made; said first capacitor being connected at one terminal to said first resistor at its point of connection to the control electrode of said first transistor and at its second terminal to the output electrode of said second transistor; said first transistor having a conducting and a nonconducting state corresponding to the voltage on its control electrode and being in the nonconducting state during the nonpulse-producing condition; said second transistor having a conducting and a nonconducting state corresponding to the voltage on its control electrode and being in a conducting state during the nonpulse-producing condition; first means having conducting and nonconducting states, in response to a level of applied voltage, connected in one circuit with said corresponding one of the input and output electrodes of said second transistor and the source of power to which said corresponding electrode is connectible for preventing conduction in said circuit of said second transistor during said nonpulse-producing condition and for creating a voltage responsive threshold voltage during said pulse-producing condition; second means for initiating conduction of said first transistor and thereby effecting a nonconducting state of said second transistor; and third means for initiating a conducting state of said first means in response to said level of applied voltage for energIzing said timing circuit with said voltage responsive threshold voltage and thereby controlling the time of conduction of said first transistor.

Claim 4

A variable pulse width monostable pulse-producing circuit comprising: a first transistor having input and output electrodes and a control electrode; a second transistor having input and output electrodes and a control electrode; a corresponding one of the input and output electrodes of each of said first and said second transistors being connectible to one terminal of a source of power; the corresponding other one of the input and output electrodes of said first and second transistors being connectible to the other terminal of said source of power; a first connection from the control electrode of said second transistor to one of the input and output electrodes of said first transistor; a timing circuit including a first resistor and a first capacitor in series connected from the control electrode of said first transistor to the corresponding one of the input and output electrodes of said second transistor; said first resistor being connected to the control electrode of said first transistor and to the one of said input and output electrodes of said first transistor opposite to the one of the input and output electrodes of said first transistor to which said first connection is made; said first capacitor being connected at one terminal to said first resistor at its point of connection to the control electrode of said first transistor and at its second terminal to the output electrode of said second transistor; said first transistor having a conducting and a nonconducting state corresponding to the voltage on its control electrode and being in the nonconducting state during the nonpulse-producing condition; said second transistor having a conducting and a nonconducting state corresponding to the voltage on its control electrode and being in a conducting state during the nonpulse-producing condition; first means having conducting and nonconducting states, in response to a level of applied voltage, connected in one circuit with said corresponding one of the input and output electrodes of said second transistor and the source of power to which said corresponding electrode is connectible for preventing conduction in said circuit of said second transistor during said nonpulse-producing condition and for creating a voltage responsive threshold voltage during said pulse-producing condition; second means for initiating conduction of said first transistor and thereby effecting a nonconducting state of said second transistor; and third means for initiating a conducting state of said first means in response to said level of applied voltage for energIzing said timing circuit with said voltage responsive threshold voltage and thereby controlling the time of conduction of said first transistor.

Claim 5

The monostable pulse-producing circuit according to claim 1 wherein said first means comprises a third transistor having input and output electrodes in said one circuit and a control electrode for creating said conducting and nonconducting states, in response to the level of applied voltage to said control electrode.

Claim 6

The monostable pulse-producing circuit according to claim 2 wherein the first, second and third transistors are MOS transistors functioning in the enhancement mode.

Claim 7

The monostable pulse-producing circuit according to claim 3 wherein the MOS transistors are P-channel transistors.

Claim 8

The monostable pulse-producing circuit according to claim 2 wherein the second means for initiating conduction for first transistor comprises a fourth transistor having input and output electrodes connected in parallel to the input and output electrodes of said first transistor and a control electrode; a resistor connected to said control electrode and to the source of power to which the resistor of said timing circuit is connected; and a second capacitor having one terminal connected to said resistor and another terminal adapted to be connected to a control pulse.

Claim 9

The monostable pulse-producing circuit according to claim 5 wherein the first, second, third and fourth transistors are MOS transistors functioning in the enhancement mode.

Claim 10

The monostable pulse-producing circuit according to claim 6 wherein the control electrode of said third transistor and the other terminal of said second capacitor are connectible to the same initiating pulse.

Claim 11

A variable pulse width monostable pulse-producing circuit comprising: a first MOS transistor having source, drain and gate electrodes; a second MOS transistor having source, drain and gate electrodes; the source electrodes of each of said first and said second transistors being connectible to one terminal of a source of power; a first resistor connected between the drain electrode of said first transistor and the other terminal of said source of power; a third MOS transistor having source, drain and gate electrodes, the source electrode of said third transistor being connected to the drain electrode of said second transistor; a second resistor connected between the drain electrode of said third transistor and the other terminal of said source of power; a first connection from the gate electrode of said second transistor to the drain electrode of said first transistor; a timing circuit including a third resistor and a first capacitor, connected from the gate electrode of said first transistor to the drain electrode of said second transistor; said third resistor being connected between the gate electrode and the source electrode of said first transistor, and said first capacitor being connected between the gate electrode of said first transistor and the drain electrode of said second transistor; a fourth resistor connected from the drain electrode of said second transistor to said one terminal of said source of power; said first transistor having a conducting and a nonconducting state corresponding to the voltage on its gate electrode and being in the nonconducting state during the nonpulse-producing condition; said second transistor having a conducting and a nonconducting state corresponding to the voltage on its gate electrode and being in a conducting state during the nonpulse-producing condition; said third transistor having a conducting and a nonconducting state corresponding to the voltage on its gate electrode and being in a nonconducting state when said second transistor is in a conducting state during said nonpulse-producing condition; means for initiating conduction of said first transistor and thereby effecting a nonconducting state of said second transistor; and means for initiating a conducting state of said third transistor for energizing said timing circuit and thereby controlling the time of conduction of said first transistor.

Claim 12

A variable pulse width monostable pulse-producing circuit comprising: a first MOS transistor having source, drain and gate electrodes; a second MOS transistor having source, drain and gate electrodes; the source electrodes of each of said first and said second transistors being connectible to one terminal of a source of power; a first resistor connected between the drain electrode of said first transistor and the other terminal of said source of power; a third MOS transistor having source, drain and gate electrodes, the source electrode of said third transistor being connected to the drain electrode of said second transistor; a second resistor connected between the drain electrode of said third transistor and the other terminal of said source of power; a first connection from the gate electrode of said second transistor to the drain electrode of said first transistor; a timing circuit including a third resistor and a first capacitor, connected from the gate electrode of said first transistor to the drain electrode of said second transistor; said third resistor being connected between the gate electrode and the source electrode of said first transistor, and said first capacitor being connected between the gate electrode of said first transistor and the drain electrode of said second transistor; a fourth resistor connected from the drain electrode of said second transistor to said one terminal of said source of power; said first transistor having a conducting and a nonconducting state corresponding to the voltage on its gate electrode and being in the nonconducting state during the nonpulse-producing condition; said second transistor having a conducting and a nonconducting state corresponding to the voltage on its gate electrode and being in a conducting state during the nonpulse-producing condition; said third transistor having a conducting and a nonconducting state corresponding to the voltage on its gate electrode and being in a nonconducting state when said second transistor is in a conducting state during said nonpulse-producing condition; means for initiating conduction of said first transistor and thereby effecting a nonconducting state of said second transistor; and means for initiating a conducting state of said third transistor for energizing said timing circuit and thereby controlling the time of conduction of said first transistor.

Claim 13

The monostable pulse-producing circuit according to claim 8 wherein the means for initiating conduction of said first transistor comprises: a fourth MOS transistor and an RC circuit; said fourth MOS transistor having source and drain electrodes connected respectively to the source and drain electrodes of said first transistor, and having a gate electrode; said RC circuit including a fifth resistor connected between the gate electrode of said fourth transistor and said one terminal of said source of power; and a second capacitor connected to the gate electrode of said fourth transistor and a pulse source.

Claim 14

The monostable pulse-producing circuit according to claim 9 wherein said first, second, third and fourth MOS transistors are adapted to operate in the enhancement mode.

Claim 15

The monostable pulse-producing circuit according to claim 10 wherein the MOS transistors are P-channel devices.

Claim 16

The monostable pulse-producing circuit according to claim 10 wherein the voltage applied to the timing circuit connected to the gate electrode of said first transistor is dependent upon the magnitude of the voltage applied to the gate electrode of said third transistor and the threshold voltage of said third transistor.