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US3718863A
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M-ary linear feedback shift register with binary logic
Assignee: Individual
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Filing: 1971-10-26
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Granted: 1973-02-27
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Expires: 1991-10-26
Abstract
Abstract A family of m-ary linear feedback shift registers with binary logic is disclosed. Each m-ary linear feedback shift register with binary logic generates a binary representation of a nonbinary recurring sequence, producable with a m-ary linear feedback shift register without binary logic in which m is greater than 2. The state table of a m-ary linear feedback shift register without binary logic, utilizing sum modulo m feedback, is first tabulated for a given initial state. The entries in the state table are coded in binary and the binary entries are used to set the initial states of the stages of a plurality of binary shift registers. A single feedback logic unit is employed which provides a separate feedback binary digit to each binary register as a function of the states of corresponding stages of the binary registers. The stages of the binary registers which are fed back depend upon the stages which are fed back through nonzero multipliers in the m-ary linear feedback shift register, utilizing sum modulo-m feedback.
Inventors
- 👤 J Fletcher
- 👤 M Perlman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 13:48
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/13; H03M13/15; G; G06; G06F; G06F7/00; G06F7/58; G06F7/582; G06F7/584; G06F7/586; G06F2207/00; G06F2207/58; G06F2207/581; G06F2207/582; G06F2207/583
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
52 words
A binary logic arrangement comprising: a plurality of binary shift registers, each of r binary stages; and feedback means coupled to corresponding stages of all of said registers for providing a separate feedback binary digit to each register as a function of the states of the stages coupled to said feedback means.
Claim 2
Dependent Claim
52 words
A binary logic arrangement comprising: a plurality of binary shift registers, each of r binary stages; and feedback means coupled to corresponding stages of all of said registers for providing a separate feedback binary digit to each register as a function of the states of the stages coupled to said feedback means.
Claim 3
Dependent Claim
40 words
A binary logic arrangement as recited in claim 1 wherein each register stage is settable in a selected initial binary state, and means for clocking said registers'' stages to provide a binary sequence corresponding to a selected nonbinary recurring sequence.
Claim 4
Dependent Claim
32 words
A binary logic arrangement as recited in claim 2 wherein the number of registers is definable as W, W > or = log2p, wherein p is a distinct prime, greater than 2.
Claim 5
Dependent Claim
36 words
A binary logic arrangement as recited in claim 3 wherein the stages of said W registers are settable to selected initial binary states whereby the length of the sequence provided by said arrangement is pr- 1.
Claim 6
Dependent Claim
31 words
A binary logic arrangement as recited in claim 2 wherein the number of registers is definable as W, W > or = log2m, wherein m is an integer greater than 2.
Claim 7
Dependent Claim
140 words
A m-ary linear feedback shift register for providing a recurring sequence, which is analogous to a nonbinary recurring sequence, in binary representation, wherein m is an integer greater than 2, comprising: a plurality of binary shift registers, each of r stages, with corresponding stages in said registers settable to initial binary states which are functions of the initial states of said nonbinary recurring sequence; feedback means coupled to selected stages of said registers, with corresponding stages of said registers being coupled to said feedback means for providing a separate feedback binary digit to each of said registers as a function of the states of the stages connected thereto; and means for clocking said registers whereby each register advances through a sequence of states, with the states of corresponding stages of said registers representing in binary a nonbinary recurring sequence, modulo-m.
Claim 8
Dependent Claim
140 words
A m-ary linear feedback shift register for providing a recurring sequence, which is analogous to a nonbinary recurring sequence, in binary representation, wherein m is an integer greater than 2, comprising: a plurality of binary shift registers, each of r stages, with corresponding stages in said registers settable to initial binary states which are functions of the initial states of said nonbinary recurring sequence; feedback means coupled to selected stages of said registers, with corresponding stages of said registers being coupled to said feedback means for providing a separate feedback binary digit to each of said registers as a function of the states of the stages connected thereto; and means for clocking said registers whereby each register advances through a sequence of states, with the states of corresponding stages of said registers representing in binary a nonbinary recurring sequence, modulo-m.
Claim 9
Dependent Claim
68 words
The arrangement as recited in claim 6 wherein said nonbinary recurring sequence is definable as ak being the sum modulo m of the states of a register, definable as A, of r stages, which are summed modulo-m through nonzero multipliers ci, each stage of register A being capable of assuming any of m states and the feedback binary digits provided by said feedback means representing ak in binary.
Claim 10
Dependent Claim
48 words
The arrangement as recited in claim 7 wherein the number of said binary registers is W, W > or = log2m, and said feedback means is coupled to corresponding stages of said W registers which correspond to stages ak i connected through nonzero multipliers for the modulo-m summation.
Claim 11
Dependent Claim
105 words
The arrangement as recited in claim 6 wherein m p, p being a prime integer and the nonbinary recurring sequence is definable as ak representing the feedbacK digit from a feedback unit which provides the sum modulo-p of the states of a register definable as A of r stages, connected to the feedback unit through r multipliers, selected ones of said multipliers providing nonzero multiplication factors, each stage of the A register being capable of assuming any of p states, and ak being fed back as the input to said A register, with the feedback binary digits from said feedback means representing ak in binary.
Claim 12
Dependent Claim
57 words
The arrangement as recited in claim 9 wherein the number of said binary registers is W, W > or = log2p, and said feedback means is coupled to the stages of each of said W registers which correspond to the stages of said A register which are connected to the feedback unit. Providing ak, through nonzero multipliers.
Claim 13
Independent Claim
172 words
The method of providing a binary representation of a nonbinary recurring sequence of the type providable by a m-ary linear feedback shift register comprising a register A of r states, each stage being capable of assuming any of m states and a feedback unit which provides a feedback digit, definable as ak, which is a function of the states of selected stages connected to the feedback unit through nonzero multipliers, the steps comprising: coding in binary states of said r stages and the ak in said nonbinary recurring sequence which starts from an initial state to which the r stages of said A register are set; providing W binary shift registers, each of r states, corresponding stages of said W registers being set to represent in binary the initial states of the r stages of said A register; and providing a feedback binary digit to each of said W registers as a function of the states of selected stages of said W registers, whereby the feedback binary digits represent ak in binary.
Claim 14
Independent Claim
172 words
The method of providing a binary representation of a nonbinary recurring sequence of the type providable by a m-ary linear feedback shift register comprising a register A of r states, each stage being capable of assuming any of m states and a feedback unit which provides a feedback digit, definable as ak, which is a function of the states of selected stages connected to the feedback unit through nonzero multipliers, the steps comprising: coding in binary states of said r stages and the ak in said nonbinary recurring sequence which starts from an initial state to which the r stages of said A register are set; providing W binary shift registers, each of r states, corresponding stages of said W registers being set to represent in binary the initial states of the r stages of said A register; and providing a feedback binary digit to each of said W registers as a function of the states of selected stages of said W registers, whereby the feedback binary digits represent ak in binary.
References Cited (Backward Citations)
US3069657A
Cited
US3439279A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-02-27 | 1976-08-28 | 1977-02-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-02-27 | 1980-08-28 | 1981-02-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-02-27 | 1984-08-28 | 1985-02-27 | $7700.00 | Window Closed / Lapsed |