Patent US3714525A successfully refreshed from Google Patents.
US3714525A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Field-effect transistors with self registered gate which acts as diffusion mask during formation
Assignee: General Electric Co
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Filing: 1970-03-02
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Granted: 1973-01-30
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Expires: 1990-03-02
Abstract
Abstract Self-registered field-effect transistors are built by forming the gate thereof at the same time the channel-adjacent portion of the source and drain regions are defined. In one embodiment a refractory metallic film is deposited over an insulating film and etched to form the gate. Subsequently, the metallic film may serve as a diffusion mask, although this is not essential. The metallic film is patterned by photoresist masking and etching. The portion of the metallic film overlying the channel region of the semiconductor body thereof is used as a gate. As a result of simultaneous definition of the channel-adjacent portions of source and draining regions and patterning of the channel-aligned portions of the gate, when source and drain regions are formed by diffusion of activators into the silicon wafer, automatic registration of the gate-adjacent portions of the source and drain junctions beneath the gate is achieved.
Inventors
- 👤 D Brown
- 👤 W Engeler
- 👤 P Gray
- 👤 M Garfinkel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 10:41
CPC Classifications
H; H10; H10D; H10D99/00; H10D30/00; H10D30/01; H10D30/021; H10D30/0223
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
202 words
A field-effect transistor device comprising: a. a semiconductor body of one conductivity type having a substantially flat major surface and a first and a second major-surface-adjacent regions of different conductivity type, defining there-between a surface-adjacent channel region, a1. said first and second regions forming asymmetrically conductive junctions with said one-conductivity-type body, a2. said junctions each intersecting said major surface to form a pair of closed geometric patterns, one of patterns surrounding the other of said patterns in said major surface; b. a first film of an insulating material overlying said major surface of said semiconductor body, b1. said insulating film forming a pattern which covers the intersections of said junctions with said major surface and all of said major surface not enclosed within said closed geometric patterns, c. a film of a refractory metal overlying said insulating film and having a pattern therein that is identical with said pattern of said first insulating film at the portions thereof adjacent said channel regions, d. electrical contacts to said first and second conductivity-modified regions, to the portion of said patterned metallic film positioned above the spacing between said first and second conductivity-modified region and to the unmodified portion of said one conductivity-type semiconductor body.
Claim 2
Dependent Claim
202 words
A field-effect transistor device comprising: a. a semiconductor body of one conductivity type having a substantially flat major surface and a first and a second major-surface-adjacent regions of different conductivity type, defining there-between a surface-adjacent channel region, a1. said first and second regions forming asymmetrically conductive junctions with said one-conductivity-type body, a2. said junctions each intersecting said major surface to form a pair of closed geometric patterns, one of patterns surrounding the other of said patterns in said major surface; b. a first film of an insulating material overlying said major surface of said semiconductor body, b1. said insulating film forming a pattern which covers the intersections of said junctions with said major surface and all of said major surface not enclosed within said closed geometric patterns, c. a film of a refractory metal overlying said insulating film and having a pattern therein that is identical with said pattern of said first insulating film at the portions thereof adjacent said channel regions, d. electrical contacts to said first and second conductivity-modified regions, to the portion of said patterned metallic film positioned above the spacing between said first and second conductivity-modified region and to the unmodified portion of said one conductivity-type semiconductor body.
Claim 3
Dependent Claim
26 words
The device of claim 1 wherein said insulating film is selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and any combination thereof.
Claim 4
Dependent Claim
19 words
The device of claim 1 wherein said metallic film is selected from the group consisting of molybdenum and tungsten.
Claim 5
Dependent Claim
19 words
The device of claim 2 wherein said metallic film is selected from the group consisting of molybdenum and tungsten.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-01-30 | 1976-07-31 | 1977-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-01-30 | 1980-07-31 | 1981-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-01-30 | 1984-07-31 | 1985-01-30 | $7700.00 | Window Closed / Lapsed |