Fet driver for capacitive loads

Claim 1

An amplifier circuit employing a plurality of field effect transistors (FETs), each having a pair of main current conducting electrodes and a gate electrode comprising: first and second voltage sources; an output stage comprising an input FET and a load FET therefor, the main current carrying electrodes of said input FET and said load FET connected between said first and second voltage sources, the output of said amplifier taken from the series connection between the main current carrying electrodes of said two FETs; a bootstrap stage comprising an input FET and a load FET, the main current carrying electrodes of said bootstrap stage load FET and said bootstrap stage input FET being serially connected between said sources; means for receiving an input signal, the gate electrode of each of said input FETs being connected for response to a signal at said input signal receiving means in a manner so that a signal of a first potential at said input signal receiving means tends to cause both said input FETs to conduct and a signal of a different potential at said input signal receiving means tends to cause both said inputs FETs to assume a high impedance condition; and capacitive coupling means connecting the gate electrodes of both of said load FETs to the junction between said bootstrap stage FETs and coupling changes in voltage at said junction to the gate terminal of said load FETs, whereby alteration in the operation of the input FET of said bootstrap stage as a result of an input signal causes a commensurate alteration in the operation of said load FETs in a regenerative fashion.