Performance checking and measuring devices and methods for signal channels

Claim 3

A method as claimed in claim 1 wherein the two derived voltages are applied in turn to a common integrator, the switching of one of said voltages being controlled by the timing waveform so that said voltage is fed to said integrator for alternate half-waves of the timing waveform, and the switching of the other of said voltages being jointly controlled by said timing waveform and a comparator connected to receive output from the integrator.

Claim 4

A method as claimed in claim 2 wherein the output pulsed waveform is a waveform of modulated pulse width produced under joint control by the timing waveform and the output from the comparator.

Claim 7

A device as claimed in claim 4 wherein the outputs from the detectors are integrated by a common integrator to which said outputs are fed in turn under the control of switching means.

Claim 8

A device as claimed in claim 5 wherein the output from the common integrator is fed to one input of a comparator the other input of which is earthed, said comparator being adapted to reverse its output and become zero when the integrated input thereto becomes zero; the timing waveform is applied to control a first switch to cause the output from the peak detector to be applied to the common integrator during alternate half-waves from the timing waveform source; and there are provided two gate circuit devices both jointly controlled by output derived from the comparator and by a waveform derived from the timing waveform source, one of said gate circuit devices providing an output controlling a second switch to cause output from the average detector to be applied to the integrator for a time each of which commences at the end of one of said alternate half-waves of the timing waveform and terminates when the aforesaid input to the integrator next reaches zero and the other of which provides a pulsed output waveform each pulse in which commences at a time of termination of the application of output from the average detector to the integrator and terminates at the time of commencement of the next following half-wave of the timing waveform.

Claim 9

A device in accordance with claim 4 and comprising a peak detector and an average detector which are oppositely sensed; means for applying the alternating current signal to the inputs of said detectors; an integrator having its input terminal connected through signal paths to the output terminals of the detectors; a pair of voltage controllable switches the first of which, when closed, applies an earth connection to a point in one of said paths and the second of which when closed applies an earth connection to a point in the other of said paths; a comparator having one input terminal earthed and the other input terminal connected to the output terminal of said integrator; two AND gates each having one input terminal fed through an inverter with the timing waveform, one of said AND gates providing a width modulated pulsed output waveform and having its second input terminal fed through another inverter with output from the comparator and the other of said AND gates having its second input connected directly to the output terminal of the comparator; means for applying the timing waveform to close the first switch during alternate half-waves; and means for utilizing the changes in output from said other AND gate to cause the second switch to open at the commencement of each of the remaining half-waves of the timing waveform and re-close at a time during said remaining half-wave which is determined by the output from the comparator.

Claim 10

A device as claimed in claim 4 wherein the switches are voltage controllable electronic switches.