Planar vector analyzer

Claim 2

A vector analyzer comprising two dividers each having two inputs of which one divider receives when in operation a voltage proportional to one of the two orthogonal components respectively of the vector to be analyzed, squaring means connected to said respective dividers, adder means connected to said two squaring means and having an output whose voltage is proportional to the sum of the two squared voltages, a regulator having comparator means for comparing said sum voltage with a constant reference voltage and having an output whose voltages is proportional to the scalar value of the vector and which is connected to said other inputs of said two dividers, in combination with two multipliers of which each has two inputs and one of which multipliers is connected to the output of one of said respective dividers, subtractor means having two inputs connected to the respective outputs of said multipliers and having a subtractor output whose voltage is proportional to the difference between two multiplier output voltages, an integrator connected to said subtractor output and having an output voltage indicative of the vector phase angle, and trigonometric-function generator means connected to the output of said integrator.

Claim 3

In a vector analyzer according to claim 1, said function generator means comprising a sine-function generator and a cosine-function generator, said integrator having its output connected through said respective function generators to sad respective other inputs of said two multipliers.

Claim 4

In a vector analyzer according to claim 2, said integrator being an electronic PI amplifier.

Claim 5

In a vector analyzer according to claim 1, said regulator being an integral regulator.

Claim 6

In a vector analyzer according to claim 1, said function generator means comprising electronic amplifiers having input circuits and negative feedback circuits, and having voltage-biased threshold diode means in at least one of said circuits.

Claim 7

Vector analyzer comprising two dividers each having two inputs of which one divider receives when in operation a voltage proportional to one of the two orthogonal components respectively of the vector to be analyzed, squaring means connected to said respective dividers, adder means connected to said two squaring means and having an output whose voltage is proportional to the sum of the two squared voltages, a regulator having comparator means for comparing said sum voltage with a constant reference voltage and having an output whose voltage is proportional to the scalar value of the vector and which is connected to said other inputs of said two dividers, adding means connected to the output of one of said dividers for adding a constant voltage magnitude, a square-root forming function generator connected to the output of said adding means and having a generator output voltage proportional to the square root of the addition result, a reversing amplifier, an arcus-cosine function generator, and means for selectively connecting the output vOltage of said square-root forming generator directly and through said reversing amplifier respectively to said arcus-cosine function in dependence upon the polarity of said other divider.

Claim 8

Vector analyzer comprising two dividers each having two inputs of which one divider receives when in operation a voltage proportional to one of the two orthogonal components respectively of the vector to be analyzed, squaring means connected to said respective dividers, adder means connected to said two squaring means and having an output whose voltage is proportional to the sum of the two squared voltages, a regulator having comparator means for comparing said sum voltage with a constant reference voltage and having an output whose voltage is proportional to the scalar value of the vector and which is connected to said other inputs of said two dividers, adding means connected to the output of one of said dividers for adding a constant voltage magnitude, a square-root forming function generator connected to the output of said adding means and having a generator output voltage proportional to the square root of the addition result, a reversing amplifier, an arcus-cosine function generator, and means for selectively connecting the output vOltage of said square-root forming generator directly and through said reversing amplifier respectively to said arcus-cosine function in dependence upon the polarity of said other divider.

Claim 9

A vector analyzer comprising two dividers each having two inputs of which one divider receives when in operation a voltage proportional to one of the two orthogonal components respectively of the vector to be analyzed, squaring means connected to said respective dividers, adder means connected to said two squaring means and having an output whose voltage is proportional to the sum of the two squared voltages, a regulator having comparator means for comparing said sum voltage with a constant reference voltage and having an output whose voltage is proportional to the scalar value of the vector and which is connected to said other inputs of said two dividers, adding means connected to the output of one of said two dividers for adding a constant voltage to the output signal of said one of said dividers, a further divider having a dividend input and a divisor input, said dividend input being connected to the output of said other divider, said divisor input being connected to said adding means to receive the resulting sum voltage therefrom, and an arcus-tangent function generator having an input connected with the output of said further divider.

Claim 10

A vector analyzer comprising two dividers each having two inputs of which one divider receives when in operation a voltage proportional to one of the two orthogonal components respectively of the vector to be analyzed, squaring means connected to said respective dividers, adder means connected to said two squaring means and having an output whose voltage is proportional to the sum of the two squared voltages, a regulator having comparator means for comparing said sum voltage with a constant reference voltage and having an output whose voltage is proportional to the scalar value of the vector and which is connected to said other inputs of said two dividers, adding means connected to the output of one of said two dividers for adding a constant voltage to the output signal of said one of said dividers, a further divider having a dividend input and a divisor input, said dividend input being connected to the output of said other divider, said divisor input being connected to said adding means to receive the resulting sum voltage therefrom, and an arcus-tangent function generator having an input connected with the output of said further divider.