Interconnected loop digital transmission system

Claim 2

In an interconnecting loop digital transmission system wherein a predetermined portion of each transmitted message block circulating in a loop includes a destination loop address code and each loop has an assigned address code, the improvement comprising: first means for developing a first signal representative of a predetermined binary relationship between the address code of the loop in which said message block is circulating at a given point in time and the address code of said destination loop; second means for developing a second signal representative of a predetermined binary relationship between the address code of a loop interconnecting with said loop in which said message block is circulating and the address code of said destination loop; and third means responsive to said first and second signals for transferring said message block to said interconnecting loop when said second signal is less than said first signal.

Claim 3

The system as defined in claim 1 wherein said first means develops a first signal representative of the Hamming distance between said address code of the loop in which said message block is circulating and said destination loop address code; said second means develops a second signal representative of the Hamming distance between said interconnecting loop address code and said destination loop address code; and said third means includes means responsive to said first and said second signals for developing a transfer signal when said second signal is less than said first signal.

Claim 4

The system as defined in claim 2 wherein said first and second means each comprises: a plurality of logic networks, each responsive to a predetermined number of bits of said destination loop address code and one oF said other loop address codes, for developing signals representative of said Hamming distance.

Claim 5

The system as defined in claim 3 wherein each of said logic networks comprises: a first logic NOR circuit responsive to said code bits; a second logic half adder circuit responsive to said code bits; and a third logic AND circuit responsive to the output signals of said first and second logic circuits.

Claim 6

In an interconnecting loop digital transmission system wherein a predetermined portion of each transmitted message block circulating in a loop includes a destination loop address code and each loop has an assigned address code, the improvement comprising: means for developing a signal representative of the Hamming distance between the address code of the loop in which said message block is circulating and said destination loop address code, said Hamming distance being indicative of the message path length to said destination loop; and means responsive to said representative signal for selectively transferring said message block to an interconnecting loop when said transfer would reduce said Hamming distance, thereby minimizing the transmission path of said message block in traversing between said loop in which said message is circulating and said destination loop.

Claim 7

In an interconnecting loop digital transmission system wherein a predetermined portion of each transmitted message block circulating in a loop includes a destination loop address code and each loop has an assigned address code, the improvement comprising: means for developing a signal representative of the Hamming distance between the address code of the loop in which said message block is circulating and said destination loop address code, said Hamming distance being indicative of the message path length to said destination loop; and means responsive to said representative signal for selectively transferring said message block to an interconnecting loop when said transfer would reduce said Hamming distance, thereby minimizing the transmission path of said message block in traversing between said loop in which said message is circulating and said destination loop.

Claim 8

In an interconnecting loop digital transmission system having apparatus for detecting destination loop address codes in each transmitted digital signal message block circulating in a loop and apparatus for transferring message blocks to interconnecting loops, the improvement comprising: means for determining the Hamming distance between said loop destination address code and the address code of the loop in which said message block is circulating; and means for effecting a transfer of said message block to an interconnecting loop when said transfer would decrease said Hamming distance.

Claim 9

In an interconnecting loop digital transmission system having apparatus for detecting destination loop address codes in each transmitted digital signal message block circulating in a loop and apparatus for transferring message blocks to interconnecting loops, the improvement comprising: means for determining the Hamming distance between said loop destination address code and the address code of the loop in which said message block is circulating; and means for effecting a transfer of said message block to an interconnecting loop when said transfer would decrease said Hamming distance.

Claim 10

The system as defined in claim 6 further comprising: first means for developing a first signal representative of the Hamming distance between said loop address code of said circulating message block and said destination loop address code; second means for developing a second signal representative of the Hamming distance between the address code of said interconnecting loop and said destination loop address code; and third means responsive to said first and said second signals for effecting said transfer when said second signal is less than said first signal.

Claim 11

The system as defined in claim 7 wherein said first and second means each comprises: a plurality of logic networks, each responsive to a predetermined number of bits of said destination loop address code and one of said other loop address codes, for developing signals representative of said Hamming distance.

Claim 12

The system as defined in claim 8 wherein each of said logic networks comprises: a first logic NOR circuit responsive to said code bits; a second logic half adder circuit responsive to said code bits; and a third logic AND circuit responsive to the output signals of said first and second logic circuits.

Claim 13

In an interconnecting loop digital transmission system having apparatus for detecting destination loop address codes in each transmitted digital signal message block circulating in a loop and apparatus for transferring message blocks to interconnecting loops, each loop having a predetermined address code, the improvement comprising: means for determining a first Hamming distance between said loop destination address code and the address code of the loop in which said message block is circulating and a second Hamming distance between said loop destination address code and an interconnecting loop address code; and means for effecting a transfer of said message block to said interconnecting loop when said second Hamming distance is less than said first Hamming distance.

Claim 14

In an interconnecting loop digital transmission system having apparatus for detecting destination loop address codes in each transmitted digital signal message block circulating in a loop and apparatus for transferring message blocks to interconnecting loops, each loop having a predetermined address code, the improvement comprising: means for determining a first Hamming distance between said loop destination address code and the address code of the loop in which said message block is circulating and a second Hamming distance between said loop destination address code and an interconnecting loop address code; and means for effecting a transfer of said message block to said interconnecting loop when said second Hamming distance is less than said first Hamming distance.

Claim 15

In an interconnecting loop digital transmission system wheRein a predetermined portion of each transmitted message block circulating in a loop includes a destination loop address code and each loop has an assigned address code, the improvement comprising: means for developing a first signal representative of a predetermined function of said loop destination address code and the address code of the instant loop in which said message block is circulating, said first signal being indicative of the number of loops to be traversed in reaching said destination loop from said instant loop; means for developing a second signal representative of a predetermined function of said loop destination address code and the address code of a loop interconnecting with said instant loop, said second signal being indicative of the number of loops to be traversed in reaching said destination loop from said interconnecting loop; and means responsive to said first and second signals for selectively transferring said message block to said interconnecting loop if such a transfer would reduce the number of loops traversed by said message block in reaching said destination loop.

Claim 16

In an interconnecting loop digital transmission system wheRein a predetermined portion of each transmitted message block circulating in a loop includes a destination loop address code and each loop has an assigned address code, the improvement comprising: means for developing a first signal representative of a predetermined function of said loop destination address code and the address code of the instant loop in which said message block is circulating, said first signal being indicative of the number of loops to be traversed in reaching said destination loop from said instant loop; means for developing a second signal representative of a predetermined function of said loop destination address code and the address code of a loop interconnecting with said instant loop, said second signal being indicative of the number of loops to be traversed in reaching said destination loop from said interconnecting loop; and means responsive to said first and second signals for selectively transferring said message block to said interconnecting loop if such a transfer would reduce the number of loops traversed by said message block in reaching said destination loop.

Claim 17

In an interconnecting loop digital transmission system wherein a predetermined portion of each transmitted message block circulating in a loop includes a destination loop address code and each loop has an assigned address code, the improvement comprising: means for developing a first signal representative of a first predetermined function of said loop destination address code and the address code of the current loop in which said message block is circulating; means for developing a second signal representative of a second predetermined function of said loop destination address code and the address code of a loop interconnecting with said current loop; and means responsive to said first and second signals for selectively transferring said message block to said interconnecting loop when said second function has a value less than said first function.

Claim 18

In an interconnecting loop digital transmission system wherein a predetermined portion of each transmitted message block circulating in a loop includes a destination loop address code and each loop has an assigned address code, the improvement comprising: means for developing a first signal representative of a first predetermined function of said loop destination address code and the address code of the current loop in which said message block is circulating; means for developing a second signal representative of a second predetermined function of said loop destination address code and the address code of a loop interconnecting with said current loop; and means responsive to said first and second signals for selectively transferring said message block to said interconnecting loop when said second function has a value less than said first function.

Claim 19

Interconnecting loop digital transmission apparatus comprising: means for determining the Hamming distance between a destination loop address code of a circulating message block and an address code of a loop in which said message block is circulating; and means for transferring said message block to an interconnecting loop when such transfer would decrease said Hamming distance.

Claim 20

Interconnecting loop digital transmission apparatus comprising: means for determining the Hamming distance between a destination loop address code of a circulating message block and an address code of a loop in which said message block is circulating; and means for transferring said message block to an interconnecting loop when such transfer would decrease said Hamming distance.

Claim 21

Interconnecting loop digital transmission apparatus wherein each loop has a preassigned address code comprising: means for determining the Hamming distance between the destination loop address code of a circulating message block and the address code of the loop in which said message block is circulating; and means for selectively transferring said message block to an interconnecting loop when said Hamming distance would be reduced.

Claim 22

Interconnecting loop digital transmission apparatus wherein each loop has a preassigned address code comprising: means for determining the Hamming distance between the destination loop address code of a circulating message block and the address code of the loop in which said message block is circulating; and means for selectively transferring said message block to an interconnecting loop when said Hamming distance would be reduced.

Claim 23

The apparatus defined in claim 14 further comprising: first means for developing a first signal representative of the Hamming distance between the loop address code of said circulating message block and said destination loop address code; second means for developing a second signal representative of the Hamming distance between an interconnecting loop address code and said destination loop address code; and third means responsive to said first and said second signals for activating said transferring means when said second signal is less than said first signal.

Claim 24

The apparatus defined in claim 15 wherein said first and second means each comprises: a plurality of logic networks, each responsive to a predetermined number of bits of said destination loop address code and one of said other loop address codes, for developing signals proportional to said Hamming distance.

Claim 25

The apparatus as defined in claim 16 wherein each of said logic networks comprises: a first logic NOR circuit responsive to said code bits; a second logic half adder circuit responsive to said code bits; and a third logic AND circuit responsive to the output signals of said first and second logic circuits.