US3707713A
Expired / Lapsed
US
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High resolution pulse rate modulated digital-to-analog converter system
Assignee: Westinghouse Electric Corp
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Filing: 1970-10-13
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Granted: 1972-12-26
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Expires: 1990-10-13
Abstract
Abstract This disclosure relates to a pulse rate modulated digital-toanalog converter system which translates the digital information into a train of identical pulses, with the pulse rate proportional to the digital data. The pulse train produced by the encoder drives an analog switch, which in cooperation with a filtering analog circuit, converts the pulse train to an analogous DC voltage.
Inventors
- 👤 Richard A Diaz
- 👤 Andras I Szabo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 07:57
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/48
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
254 words
A digital to analog converter system comprising: commutator means providing interrogating pulses in a predetermined sequence; comparator means for comparing said interrogating pulses with binary digital data located in stored digital intelligence means to ascertain coincidence, and for delivering intermediate encoded digital pulses which are a function of said binary digital data; synchronized counter means coupled with said comparator means to enable synchronization; logic circuitry means adapted to receive the output of said synchronized circuit means for logic operations thereon to provide synchronized pulses which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulses; means for logically AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digital data; analog switching means having on and off positions adapted to be selectively connected to positive or negative voltage sources respectively, and operatively connected to said logic AND gating means, the digital pulse train output providing selective actuation of said analog switching means; weighted resistor network means connected to said analog switching means, and adapted to be selectively energized by said voltages through said analog switching means; operational amplifier means having a capacitor and a resistor connected in parallel in the feedback path thereof, said operational amplifier means being coupled to such weighted resistor network means, the output of said operational amplifier means delivering an analog signal.
Claim 2
Dependent Claim
254 words
A digital to analog converter system comprising: commutator means providing interrogating pulses in a predetermined sequence; comparator means for comparing said interrogating pulses with binary digital data located in stored digital intelligence means to ascertain coincidence, and for delivering intermediate encoded digital pulses which are a function of said binary digital data; synchronized counter means coupled with said comparator means to enable synchronization; logic circuitry means adapted to receive the output of said synchronized circuit means for logic operations thereon to provide synchronized pulses which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulses; means for logically AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digital data; analog switching means having on and off positions adapted to be selectively connected to positive or negative voltage sources respectively, and operatively connected to said logic AND gating means, the digital pulse train output providing selective actuation of said analog switching means; weighted resistor network means connected to said analog switching means, and adapted to be selectively energized by said voltages through said analog switching means; operational amplifier means having a capacitor and a resistor connected in parallel in the feedback path thereof, said operational amplifier means being coupled to such weighted resistor network means, the output of said operational amplifier means delivering an analog signal.
Claim 3
Dependent Claim
201 words
A digital-to-analog converter system comprising: means for generating intermediate encoded digital pulses which are a function of binary digits located in stored digital intelligence means, comprising commutator means for providing interrogating pulses in a predetermined ordered sequence; comparator means for comparing said interrogating pulses with said binary digits in said stored digital intelligence means to ascertain coincidence, comprising first logic AND gating means, EXCLUSIVE OR gating means, said first logic AND gating means having one input connected to said binary digits and the other connected to receive said interrogating pulses, the outputs of said first logic AND gating means being applied to said EXCLUSIVE OR gating means which delivers said intermediate encoded digital pulses; means for generating synchronized pulses which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulse; second logic AND gating means for AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digits; and means for receiving and filtering said digital pulse train output to deliver an analog signal.
Claim 4
Dependent Claim
201 words
A digital-to-analog converter system comprising: means for generating intermediate encoded digital pulses which are a function of binary digits located in stored digital intelligence means, comprising commutator means for providing interrogating pulses in a predetermined ordered sequence; comparator means for comparing said interrogating pulses with said binary digits in said stored digital intelligence means to ascertain coincidence, comprising first logic AND gating means, EXCLUSIVE OR gating means, said first logic AND gating means having one input connected to said binary digits and the other connected to receive said interrogating pulses, the outputs of said first logic AND gating means being applied to said EXCLUSIVE OR gating means which delivers said intermediate encoded digital pulses; means for generating synchronized pulses which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulse; second logic AND gating means for AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digits; and means for receiving and filtering said digital pulse train output to deliver an analog signal.
Claim 5
Dependent Claim
196 words
A digital-to-analog converter system comprising means for generating intermediate encoded digital pulses which are a function of binary digits located in stored digital intelligence means; means for generating synchronized pulses, which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulse; means for logically AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digits; and means for receiving and filtering said digital pulse train output to deliver an analog signal, comprising analog switching means having on and off positions, weighted resistor network means, and filtering means, said analog switching means being adapted to be connected selectively to positive and negative voltage sources and to said second logic AND gating means, the digital pulse train output providing selective actuation of said analog switching means, the weighted resistor network being adapted to be selectively energized by said voltage sources through said analog switching means, said filtering means being connected to said weighted resistor network to deliver said analog signal.
Claim 6
Dependent Claim
196 words
A digital-to-analog converter system comprising means for generating intermediate encoded digital pulses which are a function of binary digits located in stored digital intelligence means; means for generating synchronized pulses, which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulse; means for logically AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digits; and means for receiving and filtering said digital pulse train output to deliver an analog signal, comprising analog switching means having on and off positions, weighted resistor network means, and filtering means, said analog switching means being adapted to be connected selectively to positive and negative voltage sources and to said second logic AND gating means, the digital pulse train output providing selective actuation of said analog switching means, the weighted resistor network being adapted to be selectively energized by said voltage sources through said analog switching means, said filtering means being connected to said weighted resistor network to deliver said analog signal.
Claim 7
Dependent Claim
214 words
A digital-to-analog converter system comprising means for generating intermediate encoded digital pulses which are a function of binary digits located in stored digital intelligence means; means for generating synchronized pulses, which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulse; means for logically AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digits; and means for receiving and filtering said digital pulse train output to deliver an analog signal, comprising analog switching means having on and off positions, weighted resistor network means, and filtering means, said analog switching means being adapted to be connected selectively to positive and negative voltage sources and to said logic AND gating means, the digital pulse train output providing selective actuation of said analog switching means, the weighted resistor network being adapted to be selectively energized by said voltage sources through said analog switching means, said filtering means comprising operational amplifier means having a capacitor and a resistor connected in parallel in the feedback path thereof, and being connected to said weighted resistor network to deliver said analog signal.
Claim 8
Dependent Claim
214 words
A digital-to-analog converter system comprising means for generating intermediate encoded digital pulses which are a function of binary digits located in stored digital intelligence means; means for generating synchronized pulses, which are synchronized with said intermediate encoded digital pulses, each synchronized pulse having a time width duration which is less than and wholly contained within the time width duration of the corresponding intermediate encoded digital pulse; means for logically AND gating said intermediate encoded digital and synchronized pulses and delivering a digital pulse train output which is a function of said binary digits; and means for receiving and filtering said digital pulse train output to deliver an analog signal, comprising analog switching means having on and off positions, weighted resistor network means, and filtering means, said analog switching means being adapted to be connected selectively to positive and negative voltage sources and to said logic AND gating means, the digital pulse train output providing selective actuation of said analog switching means, the weighted resistor network being adapted to be selectively energized by said voltage sources through said analog switching means, said filtering means comprising operational amplifier means having a capacitor and a resistor connected in parallel in the feedback path thereof, and being connected to said weighted resistor network to deliver said analog signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-12-26 | 1976-06-26 | 1976-12-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-12-26 | 1980-06-26 | 1980-12-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-12-26 | 1984-06-26 | 1984-12-26 | $7700.00 | Window Closed / Lapsed |