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US3706943A Expired / Lapsed US ⏱️ 0.0 years remaining

Modulating circuit

Assignee: General Electric Co
•
Filing: 1971-10-20
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Granted: 1972-12-19
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Expires: 1991-10-20
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Abstract

Abstract A temperature compensated circuit for multiplying together two input voltages, displays an output signal which is both pulse height and pulse width modulated as a function of two input voltage signals of opposite polarity. The area enveloped by the output signal may be integrated to display an output voltage potential representative of the multiplication of the two input signals.

Inventors

  • 👤 Vernon R Duncan
  • 👤 Louis L Owen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 08:20
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/161

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 198 words
A circuit for modulating pulse width as a function of a first input voltage and pulse height as a function of a second input voltage of opposite polarity comprises: A. an operational amplifier for receiving two input signals and comparing the voltage magnitudes of the input signals in a manner that produces either a positive output voltage signal or a negative output voltage signal depending upon which input voltage magnitude exceeds the other so as to display a square wave output signal; B. means for biasing the operational amplifier; C. means for applying the first input voltage to one input lead of the operational amplifier; D. means for applying a triangle voltage signal to the other input lead of the operational amplifier; E. first selector means for passing only that polarity of the amplifier output square wave where increased pulse width of the signal is a direct consequence of increased first input voltage magnitude; F. second selector means for modulating the magnitude of the signal pulses passed by the first selector means of a function of the magnitude of the second input voltage, and G. means for providing external bias voltage to the first and second selector means.
Claim 2
Dependent Claim 198 words
A circuit for modulating pulse width as a function of a first input voltage and pulse height as a function of a second input voltage of opposite polarity comprises: A. an operational amplifier for receiving two input signals and comparing the voltage magnitudes of the input signals in a manner that produces either a positive output voltage signal or a negative output voltage signal depending upon which input voltage magnitude exceeds the other so as to display a square wave output signal; B. means for biasing the operational amplifier; C. means for applying the first input voltage to one input lead of the operational amplifier; D. means for applying a triangle voltage signal to the other input lead of the operational amplifier; E. first selector means for passing only that polarity of the amplifier output square wave where increased pulse width of the signal is a direct consequence of increased first input voltage magnitude; F. second selector means for modulating the magnitude of the signal pulses passed by the first selector means of a function of the magnitude of the second input voltage, and G. means for providing external bias voltage to the first and second selector means.
Claim 3
Dependent Claim 95 words
The circuit of claim 1 wherein: the first input voltage is of a positive polarity, the triangle voltage signal includes a positive DC component equal to half the peak to peak value of the triangle signal, the output of the amplifier approximates a square wave with the width of negative pulses modulated as a function of the first input voltage amplitude, the first selector means is adapted to pass only negative extending pulses from the amplifier, and the second input voltage is of a negative polarity for modulating the magnitude of the negatively extending pulses.
Claim 4
Dependent Claim 106 words
The circuit of claim 2 wherein the first selector means includes: an NPN transistor; a first diode having a grounded cathode and an anode connecting directly to the base of the transistor so as to clamp the emitter voltage of the transistor preventing voltage excursions above zero ground voltage; a second diode wherein the cathode connects directly to receive the output signal from the amplifier and the anode connects directly to the base of the transistor; a resistive element interconnecting the base collector junction of the transistor; and means for applying a positive bias voltage to the collector and a negative bias voLtage to the emitter.
Claim 5
Dependent Claim 90 words
The circuit of claim 2 wherein the second selector means includes: a PNP transistor; a first diode having an anode connecting directly to the output of the first selector means and a cathode connecting directly to the base of the transistor; a second diode having an anode connecting directly to the second input voltage and a cathode connecting directly to the base of the transistor; and means for applying a negative bias voltage to the collector of the transistor and a positive bias voltage to the emitter of the transistor.
Claim 6
Dependent Claim 94 words
The circuit of claim 1 wherein: the first input voltage is of negative polarity; the triangle voltage signal includes a negative DC component equal to half the peak to peak value of the triangle signal; the output of the amplifier approximates a square wave with the width of positive pulses modulated as a function of the first input voltage magnitude; the first selector means is adapted to pass only positive extending pulses from the amplifier, and the second input voltage is of a positive polarity for modulating the amplitude of the positively extending pulses.
Claim 7
Dependent Claim 107 words
The circuit of claim 5 wherein the first selector means includes: a PNP transistor; a first diode having a grounded anode and a cathode connecting directly to the base of the transistor so as to clamp the emitter voltage of the transistor preventing voltage excursions below the zero ground voltage; a second diode wherein the anode connects directly to receive the output signal from the amplifier and the cathode connects directly to the base of the transistor; a resistive element interconnecting the base collector junction of the transistor; and means for applying a positive bias voltage to the emitter and a negative bias voltage to the collector.
Claim 8
Dependent Claim 90 words
The circuit of claim 5 wherein the second selector means includes: an NPN transistor; a first diode having a cathode connecting directly to the output of the first selector means and an anode connecting directly to the base of the transistor; a second diode having a cathode connecting directly to the second input voltage and an anode connecting directly to the base of the transistor; and means for applying a negative bias voltage to the emitter of the transistor and a positive bias voltage to the collector of the transistor.
Claim 9
Dependent Claim 43 words
The circuit of claim 1 wherein an integrator circuit is included to integrate the area enveloped by the output signal from the second selector thereby producing a voltage output indicative of the multiplication of the first input voltage by the second input voltage.

References Cited (Backward Citations)

US2952812A Cited
US3181074A Cited
US3384838A Cited
US3482113A Cited
US3562673A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-12-19 1976-06-19 1976-12-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-12-19 1980-06-19 1980-12-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-12-19 1984-06-19 1984-12-19 $7700.00 Window Closed / Lapsed

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