Pulse amplifier

Claim 1

An improved pulse amplifier having an input terminal and an output terminal and supplying a capacitive load comprising: a. a logic gate connected to said input terminal including a first transistor emitter coupled to a second transistor, b. a first voltage source connected to the output of said second transistor, c. first diode means connected between said first voltage source and the output of said logic gate, d. a second voltage source having a voltage significantly less than said first voltage source, e. second diode means connected between said second voltage source and said output terminal, f. third diode means connected between said first diode means and said output terminal, said first transistor being biased so as to be rendered conductive by positive going pulses at said input terminal to cause said second and third diode means to conduct thereby maintaining the voltage of said output terminal substantially at the value of said second voltage source and said second transistor being biased so as to be rendered conductive by negative going pulses at said input terminal to cause said first diode means to conduct and said second and third diode means to cease conducting thereby maintaining the voltage at said output terminal substantially at the value of said first voltage source, g. current supply means, and h. an emitter follower current switch connected between said current supply means and said output terminal, said switch being responsive to a rise in voltage at the output of said logic gAte to pass current from said current source to said capacitive load thereby reducing the rise time of the output pulse.