US3701955A — Delay equalizing amplifier having bridge circuit …

Claim 1

Independent Claim 282 words

An amplifier input circuit having envelope delay equalization capability with respect to an associated transmission facility comprising: a. a bridge having a ground terminal and an input terminal for connection of the transmission facility thereacross, a first pair of arms connected in series between the input terminal and the ground terminal, both of which arms are resistive, a second pair of arms, likewise connected in series between the input terminal and the ground terminal, one arm of which contains a resonant circuit connected to the input terminal and the other arm of which is essentially resistive, b. a solid state device capable of providing amplification having first and second input electrodes and an output electrode, the first input electrode connected to the junction between the arms of the first pair, the second input electrode connected to the junction between the arms of the second pair, the solid state device characterized in that in operation the magnitude and direction of current flowing at the output electrode is substantially the same as that flowing at the first input electrode and in proportion to a voltage applied to the second input electrode, c. a resistor connected between the output electrode and a voltage source, d. the circuit being arranged so that when alternating signals are applied from said transmission facility across the input and ground terminals of the bridge said device causes a current to flow in one arm of said bridge to keep said bridge approximately balanced and thereby generates a delay equalized current at said output electrode and causes the terminals of said bridge to present an input impedance to said transmission facilities which is substantially constant over a transmission band of frequencies.

Claim 2

Dependent Claim 282 words

An amplifier input circuit having envelope delay equalization capability with respect to an associated transmission facility comprising: a. a bridge having a ground terminal and an input terminal for connection of the transmission facility thereacross, a first pair of arms connected in series between the input terminal and the ground terminal, both of which arms are resistive, a second pair of arms, likewise connected in series between the input terminal and the ground terminal, one arm of which contains a resonant circuit connected to the input terminal and the other arm of which is essentially resistive, b. a solid state device capable of providing amplification having first and second input electrodes and an output electrode, the first input electrode connected to the junction between the arms of the first pair, the second input electrode connected to the junction between the arms of the second pair, the solid state device characterized in that in operation the magnitude and direction of current flowing at the output electrode is substantially the same as that flowing at the first input electrode and in proportion to a voltage applied to the second input electrode, c. a resistor connected between the output electrode and a voltage source, d. the circuit being arranged so that when alternating signals are applied from said transmission facility across the input and ground terminals of the bridge said device causes a current to flow in one arm of said bridge to keep said bridge approximately balanced and thereby generates a delay equalized current at said output electrode and causes the terminals of said bridge to present an input impedance to said transmission facilities which is substantially constant over a transmission band of frequencies.

Claim 3

Dependent Claim 46 words

An amplifier input circuit as defined in claim 1 in which the resistive arm of said second pair of arms is approximately equal in resistance to the opposite arm of said first pair of arms and in which said resonant circuit is a series resonant circuit.

Claim 4

Dependent Claim 38 words

An amplifier input circuit as defined in claim 2 in which the said device is a transistor having an emitter, a base and a collector corresponding to the first and second input electrodes and the output electrode respectively.

Claim 5

Dependent Claim 28 words

A circuit as defined in claim 1 in which said resonant circuit is shunt resonant, in which the opposite resistive arms of said bridge have approximately equal resistivity.

Claim 6

Dependent Claim 40 words

A circuit as defined in claim 4 in which a resistor is added in series with the capacitive branch of said shunt resonant circuit approximately equal to the direct current resistance of the inductive branch of said shunt resonant circuit.

Claim 7

Dependent Claim 144 words

A circuit as defined in claim 4 in which said shunt resonant circuit contains a tapped inductor having windings differing in resistivity per unit length on either side of the tap of said inductor, in which the portion with the smaller number of turns and the lower resistivity wire is connected in parallel with the serially connected combination of the other portion and the capacitive branch of said shunt circuit, such that the one portion is connected directly between the input terminal and said arm which is essentially resistive, and in which the relative resistivity of the portions of said inductor on either side of said tap are approximately in the ratio r1/r2 2n-1, where r1 and r2 are the resistivity of the higher and lower resistance portions respectively and n is the turns ratio between said lower resistance portion and the entire inductor.

Claim 8

Dependent Claim 53 words

A circuit as defined in claim 6 in which the said turns ratio approximately fulfills the relation n 2R2C/L, where C and L are the capacitance and inductance of the equivalent shunt resonant circuit using a non-tapped inductor and R is the resistancE of the arms of said bridge having approximately equal resistivity.

Claim 9

Dependent Claim 207 words

An amplifier circuit having envelope delay equalization capability with respect to an associated transmission facility comprising: a. a bridge having a pair of input terminals, one of which is grounded, a first pair of arms connected in series across the input connection, both of which are resistive, a second pair of arms, likewise across the input connection, one of which is essentially resistive and connected to the input terminal which is grounded, the other containing a series resonant circuit; b. a transistor having emitter, base and collector electrodes, the emitter electrode connected to the junction between the first pair of arms, the base electrode connected to the junction between the second pair of arms; c. a resistor connected between a voltage source and the collector electrode; d. the whole arranged and constructed so that when alternating signal voltages are applied across the input terminals of the bridge the transistor causes a current to flow in one arm of said first pair of arms to keep said bridge approximately balanced and thereby generates a delay equalized current at said output electrode and causes the input terminals of said bridge to present an input impedance to said transmission facility which is substantially constant over a transmission band of frequencies.

Claim 10

Dependent Claim 207 words

An amplifier circuit having envelope delay equalization capability with respect to an associated transmission facility comprising: a. a bridge having a pair of input terminals, one of which is grounded, a first pair of arms connected in series across the input connection, both of which are resistive, a second pair of arms, likewise across the input connection, one of which is essentially resistive and connected to the input terminal which is grounded, the other containing a series resonant circuit; b. a transistor having emitter, base and collector electrodes, the emitter electrode connected to the junction between the first pair of arms, the base electrode connected to the junction between the second pair of arms; c. a resistor connected between a voltage source and the collector electrode; d. the whole arranged and constructed so that when alternating signal voltages are applied across the input terminals of the bridge the transistor causes a current to flow in one arm of said first pair of arms to keep said bridge approximately balanced and thereby generates a delay equalized current at said output electrode and causes the input terminals of said bridge to present an input impedance to said transmission facility which is substantially constant over a transmission band of frequencies.

Claim 11

Dependent Claim 240 words

An amplifier circuit having envelope delay equalization capability with respect to an associated transmission facility comprising: a. a bridge having a first pair of arms connected in series across the input connection, both of which arms are resistive, and having a second pair of arms, likewise across the input connection, one of which contains a series resonant circuit and the other of which is essentially resistive, one input corner of said bridge being grounded and said series resonant circuit being connected to the other input corner of said bridge, b. a transistor having an emitter, base and collector electrodes, the emitter electrode connected through a blocking capacitor to the junction of said first pair of arms and the base electrode connected to the junction of said second pair of arms, the arms of said first pair being lower in resistance than said essentially resistive arm of said second pair by not substantially more than the amount effective to compensate for the input impedance of the transistor and for the resistance of said series resonant circuit, c. a resistor connected between a source of voltage and the collector electrode of the transistor, d. the whole arranged and constructed so that in operation the emitter electrode and collector electrode currents of the transistor are substantially equal, the alternating component thereof flowing in substantially that one of said first pair of arms which is opposite to the arm which contains said resonant circuit.

Claim 12

Dependent Claim 240 words

An amplifier circuit having envelope delay equalization capability with respect to an associated transmission facility comprising: a. a bridge having a first pair of arms connected in series across the input connection, both of which arms are resistive, and having a second pair of arms, likewise across the input connection, one of which contains a series resonant circuit and the other of which is essentially resistive, one input corner of said bridge being grounded and said series resonant circuit being connected to the other input corner of said bridge, b. a transistor having an emitter, base and collector electrodes, the emitter electrode connected through a blocking capacitor to the junction of said first pair of arms and the base electrode connected to the junction of said second pair of arms, the arms of said first pair being lower in resistance than said essentially resistive arm of said second pair by not substantially more than the amount effective to compensate for the input impedance of the transistor and for the resistance of said series resonant circuit, c. a resistor connected between a source of voltage and the collector electrode of the transistor, d. the whole arranged and constructed so that in operation the emitter electrode and collector electrode currents of the transistor are substantially equal, the alternating component thereof flowing in substantially that one of said first pair of arms which is opposite to the arm which contains said resonant circuit.

Claim 13

Dependent Claim 94 words

A circuit as defined in claim 9 in which said resistor is included in the input to additional stages of amplification, to which the current at the collector electrode is supplied, and in which there is a feedback network connecting the output of said additional stages of amplification to the emitter electrode of said transistor in negative feedback relation and in which the source impedance of said network as a generator of feedback current functions as a parallel impedance in the arm of said bridge in which said transistor causes a current to flow.

Claim 14

Dependent Claim 45 words

A circuit as defined in claim 10 in which said additional stages of amplification and said feedback network are direct current coupled and allow the potential of said emitter of said transistor to control the no-signal current of the output stage of said additional stages.

Claim 15

Dependent Claim 52 words

A circuit as defined in claim 11 in which the no-signal potential of the base of said transistor is determined by a voltage divider including three resistors two of which, by virtue of a bypass capacitor associated therewith, are effectively in parallel to consTitute one of the said second pair of arms.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1975-10-31	1976-05-01	1976-10-31	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1979-10-31	1980-05-01	1980-10-31	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1983-10-31	1984-05-01	1984-10-31	$7700.00	Window Closed / Lapsed

Delay equalizing amplifier having bridge circuit input

Abstract

Inventors

Bibliographic Details

Claims Analysis

References Cited (Backward Citations)

USPTO Annuity & Maintenance Windows

Assigned Categories & Tags

Assign Category Tag