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US3701948A Expired / Lapsed US ⏱️ 0.0 years remaining

System for phase locking on a virtual carrier

Assignee: Boeing North American Inc
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Filing: 1970-09-17
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Granted: 1972-10-31
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Expires: 1990-09-17
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Abstract

Abstract The present invention is directed to a phase lock system which can derive a demodulating carrier reference signal for use in a suppressed carrier quadrature, amplitude modulating digital data transmission system which does not require the transmission of a low level carrier or pilot tones. The system operates by multiplying the equalized received signal in each channel by the decoded n-level data signal of the other received channel, subtracting the products and dividing the result by the sum of the squares of the data signal levels to arrive at an error signal which is proportional to the phase error between the demodulating carrier reference signal and the suppressed transmitting carrier. The derived error signal can be made independent of data signal level values and the received signal levels even in the presence of severe intersymbol interference. The derived phase error signal is fed back to a variable oscillator providing the demodulating carrier reference signal to change the phase of the reference signal so as to reduce the error signal towards zero.

Inventors

  • 👤 Gerald K Mcauliffe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 17:35
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/02; H04L27/06; H04L27/066

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 419 words
In a quadrature transmission system having first and second demodulators for demodulating two independent information signals which modulate the quadrature phase of a carrier, said modulators utilizing a first and second reference phase signal for demodulating the two independent information signals; apparatus for controlling the phase of said first and second reference phase signals comprising in combination: a. a first and second sample and hold means, one connected to the output of said first demodulator and the other connected to the output of said second demodulator, said sample and hold means sampling the output signals from said demodulators at periodic times and retaining said signals until the next sample time; b. a first and second summation means, one connected to receive the output of said first sample and hold means and the other connected to receive the output of said second sample and hold means; c. a first and second analog to digital converter means, one connected to the output of said first summation means and the other connected to the output of said second summation means, providing a first and second digital output signal, respectively, which signals are proportional to the output signals from said summation means; d. a first and second equalization means one equalization means connected to receive the output of said first analog to digital converter means and the output of said first summation means, with the output of said one equalization means connected to the input of said first summation means for providing an equalized signal that is subtracted from the output signal of said first sample and hold means by said first summation means and the other equalization means connected to receive the output of said second analog to digital converter means and the output of said second summation means, the output of said other equalization means being connected to the input of said second summation means for providing an equalized signal which is subtracted from the output signal of said second sample and hold means by said second summation means; e. switching means receiving as inputs the signals from said first and second summation means for providing said signals as an error signal in response to said first and second digital output signals from said analog to digital converter means; and f. variable oscillator means responsive to said provided error signals for providing a first and second reference phase signal to said demodulators which signal varies as a function of said provided error signal so as to minimize said provided error signal.
Claim 2
Dependent Claim 419 words
In a quadrature transmission system having first and second demodulators for demodulating two independent information signals which modulate the quadrature phase of a carrier, said modulators utilizing a first and second reference phase signal for demodulating the two independent information signals; apparatus for controlling the phase of said first and second reference phase signals comprising in combination: a. a first and second sample and hold means, one connected to the output of said first demodulator and the other connected to the output of said second demodulator, said sample and hold means sampling the output signals from said demodulators at periodic times and retaining said signals until the next sample time; b. a first and second summation means, one connected to receive the output of said first sample and hold means and the other connected to receive the output of said second sample and hold means; c. a first and second analog to digital converter means, one connected to the output of said first summation means and the other connected to the output of said second summation means, providing a first and second digital output signal, respectively, which signals are proportional to the output signals from said summation means; d. a first and second equalization means one equalization means connected to receive the output of said first analog to digital converter means and the output of said first summation means, with the output of said one equalization means connected to the input of said first summation means for providing an equalized signal that is subtracted from the output signal of said first sample and hold means by said first summation means and the other equalization means connected to receive the output of said second analog to digital converter means and the output of said second summation means, the output of said other equalization means being connected to the input of said second summation means for providing an equalized signal which is subtracted from the output signal of said second sample and hold means by said second summation means; e. switching means receiving as inputs the signals from said first and second summation means for providing said signals as an error signal in response to said first and second digital output signals from said analog to digital converter means; and f. variable oscillator means responsive to said provided error signals for providing a first and second reference phase signal to said demodulators which signal varies as a function of said provided error signal so as to minimize said provided error signal.
Claim 3
Dependent Claim 51 words
The invention according to claim 1 and further comprising: a pair of low pass filters, one each interposed between the output of said first and second demodulators and the inputs to said first and second sample and hold means, so as to eliminate high frequency components of said independenT information signals.
Claim 4
Dependent Claim 154 words
The invention according to claim 1 wherein said switching means is comprised of: a. an amplifier having a positive and a negative input terminal, and an output terminal connected to drive said variable oscillator means; b. first and second switch means connecting the output of said first sample and hold means to the positive and negative input terminals, respectively, of said amplifier, said first switch means activated by the first digital output signal from said analog to digital converter and said second switch means activated by the complement of said first digital output signal; and c. third and fourth switch means connecting the output of said second sample and hold means to the positive and negative input terminals, respectively, of said amplifier, said third switch means activated by the complement of said second digital output signal from said analog to digital converter and said fourth switch means activated by said second digital output signal.

References Cited (Backward Citations)

US3134855A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-10-31 1976-05-01 1976-10-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-10-31 1980-05-01 1980-10-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-10-31 1984-05-01 1984-10-31 $7700.00 Window Closed / Lapsed

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