Patent US3700922A successfully refreshed from Google Patents.
US3700922A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Fast acting turn-off circuit
Assignee: International Business Machines Corp
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Filing: 1970-09-21
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Granted: 1972-10-24
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Expires: 1990-09-21
Abstract
Abstract A transistorized power gating circuit for providing a positive pull down of the capacitive load which derives from the load, via a feedback loop, the turn-off drive voltage required to discharge the capacitive load which drive voltage disappears as the load capacitance discharges. The circuit obviates the need of a continuous current flow to initiate the device used in discharging the load capacitance and eliminates the attendent turn-on delays associated with disabling direct coupled pull down circuits.
Inventors
- 👤 Anatol Furman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 07:14
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/04; H03K17/042; H03K17/04213
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
110 words
A self discharging capacitive load circuit comprising a capacitive load, charging means, means for coupling the charging means to the load during a first period to supply charge to said load and for isolating the charging means from the load during a second period, a discharge path for the load, and means for preventing current flow through the discharge path during said first period and for discharging the load through the path during the second period, said discharge path comprising a switching device having first, second and third terminals, the first and second terminals connected to opposite ends of said load, and its third terminal coupled to said charged load.
Claim 2
Dependent Claim
110 words
A self discharging capacitive load circuit comprising a capacitive load, charging means, means for coupling the charging means to the load during a first period to supply charge to said load and for isolating the charging means from the load during a second period, a discharge path for the load, and means for preventing current flow through the discharge path during said first period and for discharging the load through the path during the second period, said discharge path comprising a switching device having first, second and third terminals, the first and second terminals connected to opposite ends of said load, and its third terminal coupled to said charged load.
Claim 3
Dependent Claim
62 words
A fast acting turn-off circuit having reduced power consumption comprising a capacitive load connected in parallel with a discharge semiconductor, a driver for supplying charge to said load and coupled to said semiconductor, switching means for turning off said driver and feedback means from the load for placing the semiconductor in a conductive state to discharge the charge stored in said load.
Claim 4
Dependent Claim
62 words
A fast acting turn-off circuit having reduced power consumption comprising a capacitive load connected in parallel with a discharge semiconductor, a driver for supplying charge to said load and coupled to said semiconductor, switching means for turning off said driver and feedback means from the load for placing the semiconductor in a conductive state to discharge the charge stored in said load.
Claim 5
Dependent Claim
109 words
A self discharging capacitive load circuit comprising a driver having its input connected to the collector of a first transistor and through a first impedance to a voltage source and its output coupled to a capacitive load, the collector of a second transistor and through a second impedance to the base of the second transistor and the collector of a third transistor, the base of the third transistor and the emitter of the second transistor being connected to ground, the emitters of the first and third transistors being coupled together and to a current source, and means for supplying an input signal to the base of said first transistor.
Claim 6
Dependent Claim
109 words
A self discharging capacitive load circuit comprising a driver having its input connected to the collector of a first transistor and through a first impedance to a voltage source and its output coupled to a capacitive load, the collector of a second transistor and through a second impedance to the base of the second transistor and the collector of a third transistor, the base of the third transistor and the emitter of the second transistor being connected to ground, the emitters of the first and third transistors being coupled together and to a current source, and means for supplying an input signal to the base of said first transistor.
Claim 7
Dependent Claim
182 words
A self discharging capacitive load circuit comprising a voltage source coupled through a first impedance to the collector of a first transistor and the base of a second transistor and through a second impedance to the collector of the second transistor and the collector of a third transistor, the emitter of the second transistor being connected to the base of the third transistor and to the anode of a first diode, the emitter of the third transistor being coupled to the anode of a second diode and to the capacitive load, and through a third impedance to the collector of a fourth transistor, and the base of a fifth transistor, the cathode of the first diode being connected to the cathode of the second diode and the collector of the fifth transistor, the emitter of the fifth transistor being connected to the base of the fourth transistor and to ground, the emitters of the first and fourth transistor being connected together and coupled to a current source and means for impressing a time varying signal on the base of the first transistor.
Claim 8
Dependent Claim
182 words
A self discharging capacitive load circuit comprising a voltage source coupled through a first impedance to the collector of a first transistor and the base of a second transistor and through a second impedance to the collector of the second transistor and the collector of a third transistor, the emitter of the second transistor being connected to the base of the third transistor and to the anode of a first diode, the emitter of the third transistor being coupled to the anode of a second diode and to the capacitive load, and through a third impedance to the collector of a fourth transistor, and the base of a fifth transistor, the cathode of the first diode being connected to the cathode of the second diode and the collector of the fifth transistor, the emitter of the fifth transistor being connected to the base of the fourth transistor and to ground, the emitters of the first and fourth transistor being connected together and coupled to a current source and means for impressing a time varying signal on the base of the first transistor.
Claim 9
Dependent Claim
102 words
A self discharging capacitive load circuit comprising a capacitive load, charging means, means for coupling the charging means to the load during a first period to supply charge to said load and for isolating the charging means from the load during a second period, a discharge path for the load, and means for preventing current flow through the discharge path during said first period and for discharging the load through the path during the second period, said discharge path comprising a transistor having its emitter and collector connected to opposite ends of said load, and its base coupled to said charged load.
Claim 10
Dependent Claim
102 words
A self discharging capacitive load circuit comprising a capacitive load, charging means, means for coupling the charging means to the load during a first period to supply charge to said load and for isolating the charging means from the load during a second period, a discharge path for the load, and means for preventing current flow through the discharge path during said first period and for discharging the load through the path during the second period, said discharge path comprising a transistor having its emitter and collector connected to opposite ends of said load, and its base coupled to said charged load.
References Cited (Backward Citations)
US2803814A
Cited
US3213287A
Cited
US3214696A
Cited
US3289103A
Cited
US3505614A
Cited
US3465257A
Cited
US3484624A
Cited
US3510803A
Cited
US3566307A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-24 | 1976-04-24 | 1976-10-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-24 | 1980-04-24 | 1980-10-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-24 | 1984-04-24 | 1984-10-24 | $7700.00 | Window Closed / Lapsed |