Semiconductor gate-controlled pnpn switch

Claim 2

A PNPN semiconductor controlled switch comprising a waferlike body of semiconductor material having opposed major faces, a cathode region in said body of one conductivity type and defined by a first PN junction extending to said one major face, a cathode gate region of opposite conductivity type in said body extending to said one major face concentrically adjacent said cathode and separated from said cathode by said first PN junction, an anode region of said opposite conductivity type in said body extending to said one major face concentrically with said cathode region and defined by a second PN junction extending to said one major face, and an anode gate region of said one conductivity type in said body concentric to and forming a third PN junction with said cathode gate region and extending between said third and second PN junctions, each set of the adjacent three of said regions constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set.

Claim 3

In a PNPN controlled switch, a body of semiconductor material having opposed major faces, a series of four active regions in said body extending to one major face of said body, adjacent regions of said series being of different conductivity type and forming three respective PN junctions which terminate entirely at said one major face of said body, an insulating layer on said one major face covering the entirety of the intersection of each of said junctions with said one major face, said four active regions consisting of a cathode region of one conductivity type, an anode region of opposite conductivity type spaced from said cathode, an anode gate region of said one conductivity type situated between said anode region and said cathode region, and a cathode gate region of said opposite conductivity type situated between said anode gate region and said cathode region, respective metallic contacts on said major face to at least said anode region and cathode region and one of said gate regions, said anode and anode gate and cathode gate regions constituting a first analog transistor of which the anode gate is the base and the cathode gate the collector, and said cathode and cathode gate and anode gate constituting a second analog transistor of which the cathode gate is the base and the anode gate is the collector, whereby the resistance exhibited between the anode contact and the cathode contact switches from a relatively high value to a relatively low value when the product of the betas or sum of the alphas of said first and second analog transistors equals or exceeds unity a charge carrier trapping region situated adjacent the flow path of charge carriers between said anode-gate-to cathode-gate junction and one of the other junctions, said trapping region consisting of a region of said semiconductor material having an impurity concentration higher than that of the particular active region between said anode-gate-to-cathode-gate junction and said one other junction, said trapping region having the same conductivity type as said particular active region.

Claim 4

In a PNPN controlled switch, a body of semiconductor material having opposed major faces, a series of four active regions in said body extending to one major face of said body, adjacent regions of said series being of different conductivity type and forming three respective PN junctions which terminate entirely at said one major face of said body, an insulating layer on said one major face covering the entirety of the intersection of each of said junctions with said one major face, said four active regions consisting of a cathode region of one conductivity type, an anode region of opposite conductivity type spaced from said cathode, an anode gate region of said one conductivity type situated between said anode region and said cathode region, and a cathode gate region of said opposite conductivity type situated between said anode gate region and said cathode region, respective metallic contacts on said major face to at least said anode region and cathode region and one of said gate regions, said anode and anode gate and cathode gate regions constituting a first analog transistor of which the anode gate is the base and the cathode gate the collector, and said cathode and cathode gate and anode gate constituting a second analog transistor of which the cathode gate is the base and the anode gate is the collector, whereby the resistance exhibited between the anode contact and the cathode contact switches from a relatively high value to a relatively low value when the product of the betas or sum of the alphas of said first and second analog transistors equals or exceeds unity a charge carrier trapping region situated adjacent the flow path of charge carriers between said anode-gate-to cathode-gate junction and one of the other junctions, said trapping region consisting of a region of said semiconductor material having an impurity concentration higher than that of the particular active region between said anode-gate-to-cathode-gate junction and said one other junction, said trapping region having the same conductivity type as said particular active region.

Claim 5

A PNPN controlled switch comprising a body of semiconductor material having opposed major faces, a series of four active regions in said body extending to one major face of said body, adjacent regions of said series being of different conductivity type and defining therebetween three respective PN junctions which terminate entirely at said one major face of said body, an insulating layer on said one major face covering the entirety of the intersectiOn of each of said junctions with said one major face, said four active regions consisting of a cathode of one conductivity type, a cathode gate of opposite conductivity type adjacent said cathode, an anode gate of said one conductivity type adjacent said cathode gate, and an anode of said opposite conductivity type adjacent said anode gate, each set of three adjacent regions of said series constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set and a charge carrier trapping region situated adjacent and extending partially into the flow path of charge carriers between said anode-gate-to-cathode-gate junction and another of said junctions said trapping region consisting of a region of said semiconductor material having the same conductivity type and a higher impurity concentration than the particular active region between said anode-gate-to-cathode-gate junction and said other junction.

Claim 6

A PNPN controlled switch comprising a body of semiconductor material having opposed major faces, a series of four active regions in said body extending to one major face of said body, adjacent regions of said series being of different conductivity type and defining therebetween three respective PN junctions which terminate entirely at said one major face of said body, an insulating layer on said one major face covering the entirety of the intersectiOn of each of said junctions with said one major face, said four active regions consisting of a cathode of one conductivity type, a cathode gate of opposite conductivity type adjacent said cathode, an anode gate of said one conductivity type adjacent said cathode gate, and an anode of said opposite conductivity type adjacent said anode gate, each set of three adjacent regions of said series constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set and a charge carrier trapping region situated adjacent and extending partially into the flow path of charge carriers between said anode-gate-to-cathode-gate junction and another of said junctions said trapping region consisting of a region of said semiconductor material having the same conductivity type and a higher impurity concentration than the particular active region between said anode-gate-to-cathode-gate junction and said other junction.

Claim 7

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, a cathode region in said body of one conductivity type and defined by a first PN junction terminating entirely at said one major face, a cathode gate region of opposite conductivity type in said body extending to said one major face concentrically adjacent said cathode and separated from said cathode by said first PN junction, an anode region of said opposite conductivity type in said body extending to said one major face concentrically with said cathode region and defined by a second PN junction extending to said one major face, an anode gate region of said one conductivity type in said body concentric to and forming a third PN junction with said cathode gate region and extending between said third and second PN junctions, each set of three adjacent regions of the four regions of said body separated by said three PN junctions constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set, and a charge carrier trapping region in said body having said one conductivity type and having a higher impurity concentration than said anode gate region, said trapping region extending partially into the flow path of carriers between said second and third PN junctions.

Claim 8

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, a cathode region in said body of one conductivity type and defined by a first PN junction terminating entirely at said one major face, a cathode gate region of opposite conductivity type in said body extending to said one major face concentrically adjacent said cathode and separated from said cathode by said first PN junction, an anode region of said opposite conductivity type in said body extending to said one major face concentrically with said cathode region and defined by a second PN junction extending to said one major face, an anode gate region of said one conductivity type in said body concentric to and forming a third PN junction with said cathode gate region and extending between said third and second PN junctions, each set of three adjacent regions of the four regions of said body separated by said three PN junctions constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set, and a charge carrier trapping region in said body having said one conductivity type and having a higher impurity concentration than said anode gate region, said trapping region extending partially into the flow path of carriers between said second and third PN junctions.

Claim 9

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, a cathode region in said body of one conductivity type and defined by a first PN junction terminating entirely at said one major face, a cathode gate region of opposite conductivity type in said body extending to said one major face concentrically adjacent said cathode and separated from said cathode by said PN junction, an anode region of said opposite conductivity type in said body extending to said one major face concentrically with said cathode region and defined by a second PN junction extending to said one major face, an anode gate region of said one conductivity type in said body concentric to and forming a third PN junction with said cathode gate region and extending between said third and second PN junctions, each set of three adjacent regions of the four regions of said body separated by said three PN junctions constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set, and means associated with said body situated adjacent the flow path of charge carriers between said third junction and another of said junctions for trapping carriers flowing between said third junction and another of said junctions.

Claim 10

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, a cathode region in said body of one conductivity type and defined by a first PN junction terminating entirely at said one major face, a cathode gate region of opposite conductivity type in said body extending to said one major face concentrically adjacent said cathode and separated from said cathode by said PN junction, an anode region of said opposite conductivity type in said body extending to said one major face concentrically with said cathode region and defined by a second PN junction extending to said one major face, an anode gate region of said one conductivity type in said body concentric to and forming a third PN junction with said cathode gate region and extending between said third and second PN junctions, each set of three adjacent regions of the four regions of said body separated by said three PN junctions constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set, and means associated with said body situated adjacent the flow path of charge carriers between said third junction and another of said junctions for trapping carriers flowing between said third junction and another of said junctions.

Claim 11

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, an annular cathode region in said body of one conductivity type and defined by a first PN junction terminating Entirely at said one major face, an annular cathode gate region of opposite conductivity type in said body extending to said one major face adjacent said cathode and separated from said cathode by said first PN junction, an anode region of said opposite conductivity type in said body surrounded by said cathode and extending to said one major face and defined by a second PN junction extending to said one major face, and an annular anode gate region of said one conductivity type in said body forming a third PN junction with said cathode gate region and extending between said third and second PN junctions, each set of three adjacent regions of the four regions of said body separated by said three PN junctions constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set, and an epitaxial carrier trapping region in said body extending beneath said anode gate region adjacent the flow path of carriers between said anode and cathode gate regions, said carrier trapping region having the same conductivity type and a higher impurity concentration than said anode gate region.

Claim 12

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, an annular cathode region in said body of one conductivity type and defined by a first PN junction terminating Entirely at said one major face, an annular cathode gate region of opposite conductivity type in said body extending to said one major face adjacent said cathode and separated from said cathode by said first PN junction, an anode region of said opposite conductivity type in said body surrounded by said cathode and extending to said one major face and defined by a second PN junction extending to said one major face, and an annular anode gate region of said one conductivity type in said body forming a third PN junction with said cathode gate region and extending between said third and second PN junctions, each set of three adjacent regions of the four regions of said body separated by said three PN junctions constituting an analog transistor of which the middle region of the set serves as the base as well as the collector of the analog transistor constituted by the other set, and an epitaxial carrier trapping region in said body extending beneath said anode gate region adjacent the flow path of carriers between said anode and cathode gate regions, said carrier trapping region having the same conductivity type and a higher impurity concentration than said anode gate region.

Claim 13

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, an anode region in said body of one conductivity type and defined by a first PN junction extending to said one major face, an anode gate region of opposite conductivity type in said body extending to said one major face concentrically adjacent said anode and separated from said anode by said first PN junction, a cathode region of said opposite conductivity type in said body extending to said one major face concentric with said anode region and defined by a second PN junction extending to said one major face, and a cathode gate region of said one conductivity type in said body concentric to and forming a third PN junction with said anode gate region and extending between said third and second PN junctions, respective metallic contacts on said major face to at least said anode and cathode and one of said gate regions, an insulating layer on said one major face covering the entirety of the intersection of each of said junctions with said one major face, at least the first and third of the set of four of said regions separated by said three PN junctions having the same dimension measured perpendicularly to said one major face, said anode and anode gate and cathode gate regions constituting a first analog transistor of which the anode gate is the base and the cathode gate is the collector, and said cathode and cathode gate and anode gate regions constituting a second analog transistor of which the cathode gate is the base and the anode gate is the collector, whereby the resistance exhibited between the anode contact and the cathode contact switches from a relatively high value to a relatively low value when current flow across the anode-gate-to-cathode-gate junction reaches a level such that the product of the betas or sum of the alphas of said first and second analog transistors equals or exceeds unity.

Claim 14

A PNPN semiconductor controlled switch comprising a wafer-like body of semiconductor material having opposed major faces, an anode region in said body of one conductivity type and defined by a first PN junction extending to said one major face, an anode gate region of opposite conductivity type in said body extending to said one major face concentrically adjacent said anode and separated from said anode by said first PN junction, a cathode region of said opposite conductivity type in said body extending to said one major face concentric with said anode region and defined by a second PN junction extending to said one major face, and a cathode gate region of said one conductivity type in said body concentric to and forming a third PN junction with said anode gate region and extending between said third and second PN junctions, respective metallic contacts on said major face to at least said anode and cathode and one of said gate regions, an insulating layer on said one major face covering the entirety of the intersection of each of said junctions with said one major face, at least the first and third of the set of four of said regions separated by said three PN junctions having the same dimension measured perpendicularly to said one major face, said anode and anode gate and cathode gate regions constituting a first analog transistor of which the anode gate is the base and the cathode gate is the collector, and said cathode and cathode gate and anode gate regions constituting a second analog transistor of which the cathode gate is the base and the anode gate is the collector, whereby the resistance exhibited between the anode contact and the cathode contact switches from a relatively high value to a relatively low value when current flow across the anode-gate-to-cathode-gate junction reaches a level such that the product of the betas or sum of the alphas of said first and second analog transistors equals or exceeds unity.

Claim 15

A PNPN semiconductor controlled switch as defined in claim 7 wherein said cathode gate region has an annular shape, and said cathode region has an annular shape and is situated entirely within said cathode gate region.

Claim 16

A semiconductor device comprising a body of semiconductor material including four zones of alternating conductivity type; the first zone of said body being of one conductivity type and having a surface area in a surface of the body; a first ohmic connection to the first zone at said surface area; the second zone of said body being of opposite conductivity type, lying intermediate said first zone and the remaining zones of said body, and having a surface area in said surface of the body encircling the surface area of the first zone; a second ohmic connection to the second zone at the surface area of the seconD zone; the third zone of said body being of the one conductivity type, lying intermediate said first and second zones and the fourth zone of said body, and having a surface area in said surface of the body contiguous the surface area of the second zone; the fourth zone being of the opposite conductivity type, lying contiguous the third zone, and having a surface area in said surface of the body; and a third ohmic connection to the fourth zone at the surface area of the fourth zone; the first, second, and third zones having an effective alpha which is high but less than unity and the second, third, and fourth zones having an effective alpha which is low, the sum of said alphas becoming greater than unity when current flows into said second zone from said second ohmic connection causing current to flow through the device; the distance between the fourth zone and the second ohmic connection being less than the distance between the fourth zone and the first zone whereby current flowing through the device from the fourth zone toward the first zone passes adjacent the second ohmic connection before reaching the first zone.

Claim 17

A semiconductor device comprising a body of semiconductor material including four zones of alternating conductivity type; the first zone of said body being of one conductivity type and having a surface area in a surface of the body; a first ohmic connection to the first zone at said surface area; the second zone of said body being of opposite conductivity type, lying intermediate said first zone and the remaining zones of said body, and having a surface area in said surface of the body encircling the surface area of the first zone; a second ohmic connection to the second zone at the surface area of the seconD zone; the third zone of said body being of the one conductivity type, lying intermediate said first and second zones and the fourth zone of said body, and having a surface area in said surface of the body contiguous the surface area of the second zone; the fourth zone being of the opposite conductivity type, lying contiguous the third zone, and having a surface area in said surface of the body; and a third ohmic connection to the fourth zone at the surface area of the fourth zone; the first, second, and third zones having an effective alpha which is high but less than unity and the second, third, and fourth zones having an effective alpha which is low, the sum of said alphas becoming greater than unity when current flows into said second zone from said second ohmic connection causing current to flow through the device; the distance between the fourth zone and the second ohmic connection being less than the distance between the fourth zone and the first zone whereby current flowing through the device from the fourth zone toward the first zone passes adjacent the second ohmic connection before reaching the first zone.

Claim 18

A semiconductor device comprising a body of semiconductor material including a substrate of semiconductor material of one conductivity type; a layer of semiconductor material contiguous said substrate; said layer including a first zone of the one conductivity type having a surface area in a surface of the layer; said layer including a second zone of the opposite type, said second zone lying contiguous said first zone and intermediate the first zone and the remainder of said layer, and having a surface area in said surface of the layer encircling the surface area of the first zone; said layer including a third zone of the opposite conductivity type, said third zone being spaced from said first and second zones and having a surface area in said surface of the layer spaced from the surface areas of the first and second zones; the remaining portion of said layer including a region of the one conductivity type contiguous said substrate, said second zone, and said third zone, said remaining portion having a surface area in said surface encircling the surface area of the second zone and encircling the surface area of the third zone; an ohmic connection to the surface area of the first zone; an ohmic connection to the surface area of the second zone; and an ohmic connection to the surface area of the third zone; the first zone, the second zone, and said remaining portion of said layer having an effective alpha which is high but less than unity and the second zone, said remaining portion of said layer, and the third zone having an effective alpha which is low, the sum of said alphas being greater than unity when current flows into said second zone from the ohmic connection to the second zone causing current flow through the device; the ohmic connection to the second zone being located intermediate the ohmic connections to the first and third zones whereby current flowing through the device from the third zone toward the first zone passes adjacent the ohmic connection to the second zone before reaching the first zone.

Claim 19

A semiconductor device comprising a body of semiconductor material including a substrate of semiconductor material of one conductivity type; a layer of semiconductor material contiguous said substrate; said layer including a first zone of the one conductivity type having a surface area in a surface of the layer; said layer including a second zone of the opposite type, said second zone lying contiguous said first zone and intermediate the first zone and the remainder of said layer, and having a surface area in said surface of the layer encircling the surface area of the first zone; said layer including a third zone of the opposite conductivity type, said third zone being spaced from said first and second zones and having a surface area in said surface of the layer spaced from the surface areas of the first and second zones; the remaining portion of said layer including a region of the one conductivity type contiguous said substrate, said second zone, and said third zone, said remaining portion having a surface area in said surface encircling the surface area of the second zone and encircling the surface area of the third zone; an ohmic connection to the surface area of the first zone; an ohmic connection to the surface area of the second zone; and an ohmic connection to the surface area of the third zone; the first zone, the second zone, and said remaining portion of said layer having an effective alpha which is high but less than unity and the second zone, said remaining portion of said layer, and the third zone having an effective alpha which is low, the sum of said alphas being greater than unity when current flows into said second zone from the ohmic connection to the second zone causing current flow through the device; the ohmic connection to the second zone being located intermediate the ohmic connections to the first and third zones whereby current flowing through the device from the third zone toward the first zone passes adjacent the ohmic connection to the second zone before reaching the first zone.

Claim 20

A semiconductor device comprising a body of semiconductor material including four zones of alternating conductivity type and having a flat surface; the first zone of said body being of the one conductivity type of graded resistivity and having a surface area in said surface of the body; the second zone of said body being of the opposite conductivity type of graded resistivity, lying intermediate said first zone and the remaining zones of said body, and having a surface area in said surface of the body encircling the surface area of the first zone; the surface area of the first zone lying farther from a portion of the edge of the surface area of the second zone than from the remainder of the edge; the third zone of said body being of thE one conductivity type, lying intermediate said first and second zones and the fourth zone of said body, and having a surface area in said surface of the body contiguous the surface area of the second zone; said third zone including a substrate of low resistivity semiconductor material separated from the first, second, and fourth zones by the remaining portion of the third zone, said substrate having a flat interface with the remaining portion of the third zone parallel to said surface of the body; the fourth zone of said body being of the opposite conductivity type of graded resistivity and having a surface area in said surface of the body encircled by the surface area of the third zone; the surface area of the fourth zone lying closer to said portion of the edge of the surface area of the second zone than to the remainder of the edge; an ohmic connection to the surface area of the first zone; an ohmic connection to the surface area of the second zone; an ohmic connection to the surface area of the fourth zone; and the first, second, and third zones having an effective alpha which is high but less than unity and the second, third, and fourth zones having an effective alpha which is low, the sum of said alphas becoming greater than unity when current flows into said second zone from the ohmic connection to the second zone causing current to flow through the device; the ohmic connection to the second zone being located intermediate the ohmic connections to the first and forth zones whereby current flowing through the device from the fourth zone toward the first zone passes adjacent the ohmic connection to the second zone before reaching the first zone.

Claim 21

A semiconductor device comprising a body of semiconductor material including four zones of alternating conductivity type and having a flat surface; the first zone of said body being of the one conductivity type of graded resistivity and having a surface area in said surface of the body; the second zone of said body being of the opposite conductivity type of graded resistivity, lying intermediate said first zone and the remaining zones of said body, and having a surface area in said surface of the body encircling the surface area of the first zone; the surface area of the first zone lying farther from a portion of the edge of the surface area of the second zone than from the remainder of the edge; the third zone of said body being of thE one conductivity type, lying intermediate said first and second zones and the fourth zone of said body, and having a surface area in said surface of the body contiguous the surface area of the second zone; said third zone including a substrate of low resistivity semiconductor material separated from the first, second, and fourth zones by the remaining portion of the third zone, said substrate having a flat interface with the remaining portion of the third zone parallel to said surface of the body; the fourth zone of said body being of the opposite conductivity type of graded resistivity and having a surface area in said surface of the body encircled by the surface area of the third zone; the surface area of the fourth zone lying closer to said portion of the edge of the surface area of the second zone than to the remainder of the edge; an ohmic connection to the surface area of the first zone; an ohmic connection to the surface area of the second zone; an ohmic connection to the surface area of the fourth zone; and the first, second, and third zones having an effective alpha which is high but less than unity and the second, third, and fourth zones having an effective alpha which is low, the sum of said alphas becoming greater than unity when current flows into said second zone from the ohmic connection to the second zone causing current to flow through the device; the ohmic connection to the second zone being located intermediate the ohmic connections to the first and forth zones whereby current flowing through the device from the fourth zone toward the first zone passes adjacent the ohmic connection to the second zone before reaching the first zone.