Microalloy epitaxial varactor

Claim 1

A method of making a semiconductor device comprising the steps of: a. providing a semiconductor body having first and second layered regions of the same conductivity type, said second region being atop of said first region and having a higher resistivity than said first region; b. depositing a layer of an electrically conducting third region over the top surface of said second region; c. removing a portion of said third region and thereby leaving a plurality of separate zones of said third region; d. sintering said semiconductor body in an inert atmosphere and thereby causing the formation of a plurality of microscopic masses of a conductivity type different than that of said semiconductor body between said second region and each of said zones of said third region; e. removing a portion of said second region in the space between said zones of said third region and thereby causing said zones of said third region and the portions of said second region beneath them to define a plurality of mesas; f. providing a first heating of said semiconductor body in an inert atmosphere and thereby forming fourth layered regions between said second region and each of said zones of said third region, each of said fourth regions being of a different conductivity type than said second region and having a substantially uniform thickness; g. providing a first cooling of said semiconductor body in an inert atmosphere; h. providing a second heating of said semiconductor body in an inert atmosphere; i. providing a second cooling of said semiconductor body in an inert atmosphere; j. removing those portions of said zones of said third region which extend beyond the edges of said fourth and said second regions; k. passivating the top surface of said semiconductor body, including the exposed surfaces of said first, second, third and fourth regions, by covering said surfaces with at least one layer of passivating material, said layer of passivating material defining an opening therein so as to leave exposed a portion of said third region; l. providing an electrically conducting terminal in contact with each of said zones of said third region; m. annealing said semiconductor body in an inert atmosphere; n. depositing an electrically conducting material onto the bottom surFace of said first region; and o. dicing said semiconductor body to form separate devices, each of said devices having at least one of said mesas.

Claim 2

A method of making a semiconductor device comprising the steps of: a. providing a semiconductor body having first and second layered regions of the same conductivity type, said second region being atop of said first region and having a higher resistivity than said first region; b. depositing a layer of an electrically conducting third region over the top surface of said second region; c. removing a portion of said third region and thereby leaving a plurality of separate zones of said third region; d. sintering said semiconductor body in an inert atmosphere and thereby causing the formation of a plurality of microscopic masses of a conductivity type different than that of said semiconductor body between said second region and each of said zones of said third region; e. removing a portion of said second region in the space between said zones of said third region and thereby causing said zones of said third region and the portions of said second region beneath them to define a plurality of mesas; f. providing a first heating of said semiconductor body in an inert atmosphere and thereby forming fourth layered regions between said second region and each of said zones of said third region, each of said fourth regions being of a different conductivity type than said second region and having a substantially uniform thickness; g. providing a first cooling of said semiconductor body in an inert atmosphere; h. providing a second heating of said semiconductor body in an inert atmosphere; i. providing a second cooling of said semiconductor body in an inert atmosphere; j. removing those portions of said zones of said third region which extend beyond the edges of said fourth and said second regions; k. passivating the top surface of said semiconductor body, including the exposed surfaces of said first, second, third and fourth regions, by covering said surfaces with at least one layer of passivating material, said layer of passivating material defining an opening therein so as to leave exposed a portion of said third region; l. providing an electrically conducting terminal in contact with each of said zones of said third region; m. annealing said semiconductor body in an inert atmosphere; n. depositing an electrically conducting material onto the bottom surFace of said first region; and o. dicing said semiconductor body to form separate devices, each of said devices having at least one of said mesas.

Claim 17

A method of making a semiconductor varactor comprising the steps of: a. providing a semicOnductor body having first and second layered regions of N + and N conductivity types, respectively, said second region being epitaxially grown atop said first region and having a higher resistivity than said first region; b. depositing a third region onto the top surface of said second region by evaporating a layer of metal thereon; c. removing a portion of said third region by photo-resistant techniques and thereby leaving a plurality of separate zones of said third region; d. sintering said semiconductor body in a nitrogen atmosphere at a temperature in the range from 690* C to 710* C for a duration of 30 + or - 5 minutes and thereby causing the formation of a plurality of microscopic masses of P conductivity type between said second region and said zones of said third region; e. removing a first portion of said second region to a depth of approximately 5 microns in the space between said zones of said third region by etching with a fluid comprising 1- 2 parts HF to 5- 15 parts HNO3 to 2- 5 parts glacial acetic acid with negligible agitation of said semiconductor body, said zones of said third region serving as masks and thereby causing said zones of said third region and the portions of said second region beneath them to define a plurality of mesas; f. providing a first heating of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 845* C to 855* C for a duration of 15 + or - 5 minutes and thereby forming fourth layered regions between said second region and each of said zones of said third region, each of said fourth regions being of P conductivity type and having a substantially uniform thickness; g. providing a first cooling of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 395* to 405* C for a duration of approximately 3 minutes, followed by an air quench at room temperature; h. removing a second portion of said second region in the space between said zones of said third region by etching with a fluid comprising 1- 2 parts HF to 5- 15 parts HNO3 to 2- 5 parts glacial acetic acid with negligible agitation of said semiconductor body, said zones of said third region serving as masks, and thereby causing said zones of said third region and said fourth and second regions beneath them to further define said plurality of mesas; i. providing a second heating of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 895* C to 905* C for a duration of 15 + or - 5 minutes; j. providing a second cooling of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 400* C to 450* C for a duration of 3 + or - 1 minutes, followed by an air quench at room temperature; k. removing a third portion of said second region down to the upper surface of said first region in the space between said zones of said third region by etching with a fluid comprising 1- 2 parts HF to 5- 15 parts HNO3 to 2-5 parts glacial acetic acid with negligible agitation of said semiconductor body, said zones of said third region serving as masks, and thereby causing said zones of said third region and said fourth and second regions beneath them to further define said plurality of mesas; l. removing those portions of said zones of said third region which extend beyond the edges of said fourth and said second regions by exposing said semiconductor body to ultra-sonic vibration; m. passivating the top surface of said semiconductor body, including the exposed surfaces of said first, second, third and fourth regions by reactively sputtering three layers of passivating material thereon; n. centrifugally depositing over said third layer of passivating material a layer of glass fRom out of a colloidal solution of powdered glass, said layer of glass being fused to said third layer of passivating material by heating at a temperature of approximately 550* C; o. exposing a portion of the top surface of each of said zones of said third region by removing a portion of each of said layers of passivating material and a portion of said layer of glass directly above said top surfaces of said zones by masking and etching with a HF-glycol solution; p. providing electrically conducting terminals in contact with said top surfaces of said zones of said third region by first evaporating a layer of an electrically conducting metal onto said top surfaces and onto said layer of glass, followed by the etching away of substantially all of said layer of metal not directly above said top surfaces; q. annealing said semiconductor body in a nitrogen atmosphere at a temperature in the range from 598* C to 602* C for a duration of 5 + or - 1/2 minutes, followed by cooling in a nitrogen atmosphere at a temperature of from 400* C to 450* C for a duration of 5 + or - 2 minutes and an air quench at room temperature; r. depositing an electrically conducting material onto the bottom surface of said first region; and s. dicing said semiconductor body to form separate varactors, each of said varactors having at least one of said mesas.

Claim 18

A method of making a semiconductor varactor comprising the steps of: a. providing a semicOnductor body having first and second layered regions of N + and N conductivity types, respectively, said second region being epitaxially grown atop said first region and having a higher resistivity than said first region; b. depositing a third region onto the top surface of said second region by evaporating a layer of metal thereon; c. removing a portion of said third region by photo-resistant techniques and thereby leaving a plurality of separate zones of said third region; d. sintering said semiconductor body in a nitrogen atmosphere at a temperature in the range from 690* C to 710* C for a duration of 30 + or - 5 minutes and thereby causing the formation of a plurality of microscopic masses of P conductivity type between said second region and said zones of said third region; e. removing a first portion of said second region to a depth of approximately 5 microns in the space between said zones of said third region by etching with a fluid comprising 1- 2 parts HF to 5- 15 parts HNO3 to 2- 5 parts glacial acetic acid with negligible agitation of said semiconductor body, said zones of said third region serving as masks and thereby causing said zones of said third region and the portions of said second region beneath them to define a plurality of mesas; f. providing a first heating of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 845* C to 855* C for a duration of 15 + or - 5 minutes and thereby forming fourth layered regions between said second region and each of said zones of said third region, each of said fourth regions being of P conductivity type and having a substantially uniform thickness; g. providing a first cooling of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 395* to 405* C for a duration of approximately 3 minutes, followed by an air quench at room temperature; h. removing a second portion of said second region in the space between said zones of said third region by etching with a fluid comprising 1- 2 parts HF to 5- 15 parts HNO3 to 2- 5 parts glacial acetic acid with negligible agitation of said semiconductor body, said zones of said third region serving as masks, and thereby causing said zones of said third region and said fourth and second regions beneath them to further define said plurality of mesas; i. providing a second heating of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 895* C to 905* C for a duration of 15 + or - 5 minutes; j. providing a second cooling of said semiconductor body in a nitrogen atmosphere at a temperature in the range from 400* C to 450* C for a duration of 3 + or - 1 minutes, followed by an air quench at room temperature; k. removing a third portion of said second region down to the upper surface of said first region in the space between said zones of said third region by etching with a fluid comprising 1- 2 parts HF to 5- 15 parts HNO3 to 2-5 parts glacial acetic acid with negligible agitation of said semiconductor body, said zones of said third region serving as masks, and thereby causing said zones of said third region and said fourth and second regions beneath them to further define said plurality of mesas; l. removing those portions of said zones of said third region which extend beyond the edges of said fourth and said second regions by exposing said semiconductor body to ultra-sonic vibration; m. passivating the top surface of said semiconductor body, including the exposed surfaces of said first, second, third and fourth regions by reactively sputtering three layers of passivating material thereon; n. centrifugally depositing over said third layer of passivating material a layer of glass fRom out of a colloidal solution of powdered glass, said layer of glass being fused to said third layer of passivating material by heating at a temperature of approximately 550* C; o. exposing a portion of the top surface of each of said zones of said third region by removing a portion of each of said layers of passivating material and a portion of said layer of glass directly above said top surfaces of said zones by masking and etching with a HF-glycol solution; p. providing electrically conducting terminals in contact with said top surfaces of said zones of said third region by first evaporating a layer of an electrically conducting metal onto said top surfaces and onto said layer of glass, followed by the etching away of substantially all of said layer of metal not directly above said top surfaces; q. annealing said semiconductor body in a nitrogen atmosphere at a temperature in the range from 598* C to 602* C for a duration of 5 + or - 1/2 minutes, followed by cooling in a nitrogen atmosphere at a temperature of from 400* C to 450* C for a duration of 5 + or - 2 minutes and an air quench at room temperature; r. depositing an electrically conducting material onto the bottom surface of said first region; and s. dicing said semiconductor body to form separate varactors, each of said varactors having at least one of said mesas.