Patent US3683288A successfully refreshed from Google Patents.
US3683288A
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Frequency modulation demodulator
Assignee: Texas Instruments Inc
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Filing: 1970-07-31
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Granted: 1972-08-08
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Expires: 1990-07-31
Abstract
Abstract A self-clocking system for extracting from a composite signal, data and clock signal separation in a frequency modulation data system. The clock signal is separated from the data signal in order to use it to clock the data into and/or out of registers and other elements in the system. The demodulator system contains a synchronized multivibrator or other oscillator which tracks with any reasonable change in character or frequency of the composite frequency modulated signal generated, for example, from a recording medium such as a magnetic disc, drum or tape. If the frequency changes, or a clock pulse is not present for one bit cell, the multivibrator or oscillator maintains the integrity of the signals on the demodulator outputs and by coupling the multivibrator or other oscillator output to a flip-flop and further coupling the outputs of the flip-flop to appropriate logic circuitry, clock and data separation is thereby obtained.
Inventors
- 👤 Joseph E Curry
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 19:34
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1407; G11B20/1419
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
100 words
A demodulator for separating from a composite signal a first and second signal, comprising: square wave generating means for producing a square wave output at a frequency approximately equal to the sum of the frequency of said first plus said second signals, means for synchronizing said square wave output with said composite signal, frequency dividing means coupled to said square wave generating means for producing two out of phase signals at half the frequency of said square wave output, and logic means for combining said out of phase signals with said composite signal to produce separate first and second signals.
Claim 2
Dependent Claim
100 words
A demodulator for separating from a composite signal a first and second signal, comprising: square wave generating means for producing a square wave output at a frequency approximately equal to the sum of the frequency of said first plus said second signals, means for synchronizing said square wave output with said composite signal, frequency dividing means coupled to said square wave generating means for producing two out of phase signals at half the frequency of said square wave output, and logic means for combining said out of phase signals with said composite signal to produce separate first and second signals.
Claim 3
Dependent Claim
114 words
A demodulator for separating from a composite signal first and second signals, comprising: square wave generating means for producing a square wave output at a frequency approximately equal to the sum of the frequency of the first plus second signals, synchronizing means connected to said square wave generating means having as an input said composite signal for synchronizing said square wave output with said composite signal, frequency dividing means coupled to said square wave generating means for producing two out of phase signals at half the frequency of said square wave output, and logic means for combining said two out of phase signals with said composite signal to produce separate first and second signals.
Claim 4
Dependent Claim
114 words
A demodulator for separating from a composite signal first and second signals, comprising: square wave generating means for producing a square wave output at a frequency approximately equal to the sum of the frequency of the first plus second signals, synchronizing means connected to said square wave generating means having as an input said composite signal for synchronizing said square wave output with said composite signal, frequency dividing means coupled to said square wave generating means for producing two out of phase signals at half the frequency of said square wave output, and logic means for combining said two out of phase signals with said composite signal to produce separate first and second signals.
Claim 5
Dependent Claim
15 words
A demodulator according to claim 2 wherein said square wave generating means is a multivibrator.
Claim 6
Dependent Claim
56 words
A demodulator according to claim 2 wherein said logic means comprise two gates, one of said gates having as its inputs one of said out of phase signals and the same out of phase signal delayed and the other gate having as its inputs the composite signal and the other of said out of phase signals.
Claim 7
Dependent Claim
19 words
A demodulator according to claim 2 wherein said two out of phase signals are out of phase by 180*.
Claim 8
Dependent Claim
110 words
A demodulator for separating from a composite signal the data and clock signals, comprising: means for generating a square wave output at a frequency approximately equal to the sum of the frequency of the data plus clock signals, synchronizing means connected to said square wave generating means having as an input said composite signal for synchronizing said square wave output with said composite signal, flip-flop means coupled to said square wave generating means for generating a true and complement output at half the frequency of said square wave output, and logic means for combining said composite signal with said true and complement outputs to produce separate data and clock signals.
Claim 9
Dependent Claim
110 words
A demodulator for separating from a composite signal the data and clock signals, comprising: means for generating a square wave output at a frequency approximately equal to the sum of the frequency of the data plus clock signals, synchronizing means connected to said square wave generating means having as an input said composite signal for synchronizing said square wave output with said composite signal, flip-flop means coupled to said square wave generating means for generating a true and complement output at half the frequency of said square wave output, and logic means for combining said composite signal with said true and complement outputs to produce separate data and clock signals.
Claim 10
Dependent Claim
15 words
A demodulator according to claim 6 wherein said square wave generating means is a multivibrator.
Claim 11
Dependent Claim
39 words
A demodulator according to claim 6 wherein said logic means comprise two gates, one of said gates having as an input said true output while said second gate has as its inputs the composite signal and the complement output.
Claim 12
Dependent Claim
13 words
A demodulator according to claim 6 wherein said logic means comprise two flip-flops.
Claim 13
Dependent Claim
137 words
A self-clocking demodulator for separating data and clock signals from a composite signal composed of a data block and a preamble preceding each said block, comprising: means for generating a square wave output at a frequency approximately equal to the sum of the data plus clock signals, synchronizing means connected to said square wave generating means having as an input said composite signal for synchronizing said square wave output with said composite signal, flip-flop means coupled to said square wave generating means for generating a true and complement output at half the frequency of said square wave output, means for identifying said preamble and synchronizing said flip-flop with said composite data, and logic means responsive to said identifying means for combining said composite signal with said true and complement outputs to produce separate data and clock signals.
Claim 14
Dependent Claim
137 words
A self-clocking demodulator for separating data and clock signals from a composite signal composed of a data block and a preamble preceding each said block, comprising: means for generating a square wave output at a frequency approximately equal to the sum of the data plus clock signals, synchronizing means connected to said square wave generating means having as an input said composite signal for synchronizing said square wave output with said composite signal, flip-flop means coupled to said square wave generating means for generating a true and complement output at half the frequency of said square wave output, means for identifying said preamble and synchronizing said flip-flop with said composite data, and logic means responsive to said identifying means for combining said composite signal with said true and complement outputs to produce separate data and clock signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-08-08 | 1976-02-07 | 1976-08-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-08-08 | 1980-02-07 | 1980-08-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-08-08 | 1984-02-07 | 1984-08-08 | $7700.00 | Window Closed / Lapsed |