Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
410 words
An analog computer apparatus comprising: first means for supplying a first analog data signal; second means, responsive to said first means, for successively generating a plurality of second analog data signals identical to said first analog data signal but being successively delayed with respect to each other and said first analog data signal by successive predetermined periods of time, said second means comprising a first track of an analog storage tape recorder, a first record head coupled to said first means for supplying said first analog data signal to said first track, a reproduction head spaced apart by a predetermined distance from said record head, so that when said first track is moved in the direction from said reproduction head toward said record head, after said first analog data signal has been stored on said first track, said reproduction head will produce said first signal delayed with respect to the reproduction of said first signal during a previous pass of said track; third means, responsive to said second means, and being coupled to said reproduction head, for multiplying each of said successively generated second analog data signals by predetermined weighting coefficients, each multiplication corresponding to an individual pass of said tape past said reproduction head, to produce third analog signals; and fourth means, responsive to said third means, for generating an analog output signal representative of the convolution of said first analog data signal with a signal representative of said weighting coefficients, including an adder circuit, having a first input connected to the output of said third means, a second storage tape track coupled to the output of said adder circuit through a record head, whereby the output of said adder circuit will be recorded on said second track, a reproduction head spaced apart from said record head a predetermined distance, so that when said second track passes by said reproduction head in the direction of said record head, the signal on said second track will be detected by said reproduction head and an output will be produced therefrom, and means for coupling the output of said reproduction head to a second input of said adder circuit, whereby the signal stored on said second tape track will be successively added with the output of said coefficient multiplier, and further including means for coupling the output of said reproduction head associated with said second track to an output terminal whereby said analog output signal representative of said convolution will be reproduced.
Claim 2
Dependent Claim
410 words
An analog computer apparatus comprising: first means for supplying a first analog data signal; second means, responsive to said first means, for successively generating a plurality of second analog data signals identical to said first analog data signal but being successively delayed with respect to each other and said first analog data signal by successive predetermined periods of time, said second means comprising a first track of an analog storage tape recorder, a first record head coupled to said first means for supplying said first analog data signal to said first track, a reproduction head spaced apart by a predetermined distance from said record head, so that when said first track is moved in the direction from said reproduction head toward said record head, after said first analog data signal has been stored on said first track, said reproduction head will produce said first signal delayed with respect to the reproduction of said first signal during a previous pass of said track; third means, responsive to said second means, and being coupled to said reproduction head, for multiplying each of said successively generated second analog data signals by predetermined weighting coefficients, each multiplication corresponding to an individual pass of said tape past said reproduction head, to produce third analog signals; and fourth means, responsive to said third means, for generating an analog output signal representative of the convolution of said first analog data signal with a signal representative of said weighting coefficients, including an adder circuit, having a first input connected to the output of said third means, a second storage tape track coupled to the output of said adder circuit through a record head, whereby the output of said adder circuit will be recorded on said second track, a reproduction head spaced apart from said record head a predetermined distance, so that when said second track passes by said reproduction head in the direction of said record head, the signal on said second track will be detected by said reproduction head and an output will be produced therefrom, and means for coupling the output of said reproduction head to a second input of said adder circuit, whereby the signal stored on said second tape track will be successively added with the output of said coefficient multiplier, and further including means for coupling the output of said reproduction head associated with said second track to an output terminal whereby said analog output signal representative of said convolution will be reproduced.
Claim 3
Dependent Claim
26 words
An apparatus according to claim 1, further including a filter and a sensitivity adjusting circuit switchably connected to the reproduction head of said second tape track.
Claim 4
Dependent Claim
70 words
An apparatus according to claim 2, further including means for substantially eliminating the effects of recorder noise from said convolution signal including a third and fourth tape recorder channel corresponding to a third and a fourth tape recorder track, respectively connected in series with each of the first and second channels corresponding to said first and second tape tracks, for recording only the noise stored on the tape storage tracks.
Claim 5
Dependent Claim
66 words
An apparatus according to claim 3, further including a second adder circuit connected between said adder circuit of said fourth means and said third and fourth channels for combining the signals produced therein at a first pair of inputs thereof and for inversely adding thereto the output of said adder circuit of said fourth means, whereby said noise signals will be cancelled from said convolution signal.
Claim 6
Dependent Claim
35 words
An apparatus according to claim 4, wherein said third channel further includes an additional coefficient multiplying means for successively weighting the signals produced by said third channel to be delivered to said second adder circuit.