Controlled pause in data processing appartus

Claim 2

A data processing system comprising N asynchronous subunits, N > OR = 1, for performing asynchronous processing operations in response to applied input signals, said asynchronous operations being of such a nature as to preclude a predetermination of the time of completion of said asynchronous operations, each of said subunits including means for indicating the completion of processing by the respective subunit, means for receiving a request to halt a first subset of said subunits, said first subset including at least one of said subunits, and means responsive to said indication of the completion of processing by each subunit in said subset for measuring the elapsed time from the occurrence of said request to halt until the completion of processing by each of said first subset of subunits underway at the time of occurrence of said request to halt.

Claim 3

Apparatus according to claim 1 wherein said means for measuring comprises a source of periodic clock signals having period P responsive to said request to halt, and a counter associated with each subunit in said subset for counting the number of said clock signals occurring in the interval from the occurrence of said request until said completion of processing by the respective one of said subunits.

Claim 4

Apparatus according to claim 2 further comprising means for storing information relating to the count of each of said counters.

Claim 5

Apparatus according to claim 1 further comprising means responsive to said request to halt for inhibiting input signals to said first subset of said subunits.

Claim 6

Apparatus according to claim 3 further comprising means for storing results of processing by each of said subunits which are generated after the occurrence of said request to halt.

Claim 7

Apparatus according to claim 3 further comprising means for generating completion signals indicating that all of said subset of said subunits have completed processing in progress at the time of said request to halt, and means responsive to said completion signals for restarting processing by said subset of said subunits.

Claim 8

Apparatus according to claim 6 wherein said means for restarting comprises means for entering data indicating the time of occurrence, relative to a request for halt, of the completion of processing in progress at the time said request to halt occurred Into respective ones of said counters, means for periodically decrementing the contents of each of said counters by applying pulse signals with period P, and means for generating an all-zero signal for each subunit of said subset upon detecting a count of zero in the respective counter.

Claim 9

In a data processing system, apparatus for synchronizing the restart of a plurality of asynchronous subunits of said system, which asynchronous subunits are adapted for performing asynchronous operations, the completion of which operations may not be determined a priori, which subunits have been paused in response to a pause request, said synchronized restart being signaled by a restart signal, comprising: means for storing for each of said plurality of subunits information indicative of the elapsed time, TE, from the time of occurrence of said pause request until the completion of processing in progress at said time of occurrence at the respective ones of said paused subunits, and means responsive to respective stored information for delaying, relative to said restart signal, the enabling for normal operation of each of said paused subunits for a period equal to the respective value of TE.

Claim 10

In a data processing system, apparatus for synchronizing the restart of a plurality of asynchronous subunits of said system, which asynchronous subunits are adapted for performing asynchronous operations, the completion of which operations may not be determined a priori, which subunits have been paused in response to a pause request, said synchronized restart being signaled by a restart signal, comprising: means for storing for each of said plurality of subunits information indicative of the elapsed time, TE, from the time of occurrence of said pause request until the completion of processing in progress at said time of occurrence at the respective ones of said paused subunits, and means responsive to respective stored information for delaying, relative to said restart signal, the enabling for normal operation of each of said paused subunits for a period equal to the respective value of TE.

Claim 11

Apparatus according to claim 8 further comprising means for storing the results of processing generated during said elapsed time, and means for generating an output corresponding to said stored results after said period equal to TE.

Claim 12

Apparatus according to claim 8 further comprising means for inhibiting input signals to said paused subunits until said paused subunit is restarted.