Nonvolatile flip-flop memory cell

Claim 2

A nonvolatile memory cell for nonvolatilely holding a binary bit of information therein without power being applied thereto, comprising: a. volatile bistable memory means having two bistable terminals for storing a binary bit of information therein and reading binary information thereout while power is supplied thereto; and b. first and second nonvolatile memory means connected to the two bistable terminals of the volatile bistable memory means, for nonvolatilely storing the relative voltage values of the two bistable terminals of the volatile bistable memory means during the loss of power to the volatile bistable memory means, so that the binary bit of information is nonvolatilely held during the absence of power to the volatile bistable memory means.

Claim 3

The nonvolatile memory cell of claim 1 wherein the volatile bistable memory means is a volatile flip-flop circuit.

Claim 4

The nonvolatile memory cell of claim 1 wherein the first and second nonvolatile memory means are nonvolatile transistors which have variable threshold voltages, each nonvolatile transistor being able to nonvolatilely store the voltage value of its bistable terminal of the volatile bistable memory means during the absence of power to the volatile bistable memory means.

Claim 5

The nonvolatile memory cell of claim 3 wherein the first and second nonvolatile transistors are nonvolatile MNOS transistors which have variable threshold voltages, each nonvolatile MNOS transistor being able to nonvolatilely store the voltage value of its bistable terminal of the volatile bistable memory means during the absence of power to the volatile bistable memory means.

Claim 6

A nonvolatile flip-flip memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop ciRcuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of said first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of said second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; and e. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage to the gate electrodes of said first and second nonvolatile variable threshold voltage transistors as the power supply means begins to fail.

Claim 7

A nonvolatile flip-flip memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop ciRcuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of said first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of said second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; and e. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage to the gate electrodes of said first and second nonvolatile variable threshold voltage transistors as the power supply means begins to fail.

Claim 8

A nonvolatile flip-flop memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop circuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; e. a drain voltage means connected to the drain electrode of each nonvolatile variable threshold voltage transistor for applying a drain voltage to the drain electrode of each nonvolatile variable threshold voltage transistor; f. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage as the power supply means begins to fail; and g. a gate writing voltage means connectable through the power supply sensing switch means to the gate electrode of each nonvolatile variable threshold voltage transistor for negatively increasing the threshold voltage of the nonvolatile variable threshold voltage transistor whose source electrode is connected to the bistable terminal of the volatile flip-flop circuit which is at the less negative voltage value, as the power supply means begins to fail to deliver power to the volatile flip-flop circuit.

Claim 9

A nonvolatile flip-flop memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop circuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; e. a drain voltage means connected to the drain electrode of each nonvolatile variable threshold voltage transistor for applying a drain voltage to the drain electrode of each nonvolatile variable threshold voltage transistor; f. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage as the power supply means begins to fail; and g. a gate writing voltage means connectable through the power supply sensing switch means to the gate electrode of each nonvolatile variable threshold voltage transistor for negatively increasing the threshold voltage of the nonvolatile variable threshold voltage transistor whose source electrode is connected to the bistable terminal of the volatile flip-flop circuit which is at the less negative voltage value, as the power supply means begins to fail to deliver power to the volatile flip-flop circuit.

Claim 10

A nonvolatile flip-flop memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop circuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; e. a drain voltage means connected to the drain electrode of each nonvolatile variable thReshold voltage transistor for applying a drain voltage to the drain electrode of each nonvolatile variable threshold voltage transistor; f. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage as the power supply means begins to fail; g. a gate writing voltage means connectable through the power supply sensing switch means to the gate electrode of each nonvolatile variable threshold voltage transistor for negatively increasing the threshold voltage of the nonvolatile variable threshold voltage transistor whose source electrode is connected to the bistable terminal of the volatile flip-flop circuit which is at the less negative voltage value, as the power supply means begins to fail to deliver power to the volatile flip-flop circuit; and h. a gate reading voltage means connectable to the gate electrodes of said nonvolatile variable threshold voltage transistors just before the resumption of power from said power supply means to said volatile flip-flop circuit for turning on the nonvolatile variable threshold voltage transistor whose threshold voltage was not negatively increased, prior to the turning on of the nonvolatile variable threshold voltage transistor whose threshold voltage was negatively increased, to reset the volatile flip-flop circuit to the state which it had prior to the loss of power thereto.

Claim 11

A nonvolatile flip-flop memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop circuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; e. a drain voltage means connected to the drain electrode of each nonvolatile variable thReshold voltage transistor for applying a drain voltage to the drain electrode of each nonvolatile variable threshold voltage transistor; f. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage as the power supply means begins to fail; g. a gate writing voltage means connectable through the power supply sensing switch means to the gate electrode of each nonvolatile variable threshold voltage transistor for negatively increasing the threshold voltage of the nonvolatile variable threshold voltage transistor whose source electrode is connected to the bistable terminal of the volatile flip-flop circuit which is at the less negative voltage value, as the power supply means begins to fail to deliver power to the volatile flip-flop circuit; and h. a gate reading voltage means connectable to the gate electrodes of said nonvolatile variable threshold voltage transistors just before the resumption of power from said power supply means to said volatile flip-flop circuit for turning on the nonvolatile variable threshold voltage transistor whose threshold voltage was not negatively increased, prior to the turning on of the nonvolatile variable threshold voltage transistor whose threshold voltage was negatively increased, to reset the volatile flip-flop circuit to the state which it had prior to the loss of power thereto.

Claim 12

A nonvolatile flip-flop memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop circuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; e. a drain voltage means connected to the drain electrode of each nonvolatile variable threshold voltage transistor for applying a drain voltage to the drain electrode of each nonvolatile variable threshold voltage transistor; f. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage as the power supply means begins to fail; g. a gate writing voltage means connectable through the power supply sensing switch means to the gate electrode of each nonvolatile variable threshold voltage transistor for negatively increasing the threshold voltage of the nonvolatile variable threshold voltage MNOS transistor whose source electrode is connected to the bistable terminal of the volatile flip-flop circuits which is at the less negative voltage value, as the power supply means begins to fail to deliver power to the volatile flip-flop circuit; h. a gate reading voltage means connectable to the gate electrodes of said nonvolatile variable threshold voltage transistors just before the resumption of power from said power supply means to said volatile flip-flop circuit for turning on the nonvolatile variable threshold voltage transistor whose threshold voltage was not negatively increased prior to the turning on of the nonvolatile variable threshold voltage transistor whose threshold voltage was negatively increased to reset the volatile flip-flop circuit to the state which it had prior to the loss of power thereto; and i. a gate voltage erasing means connectable to the gate electrodes of said nonvolatile variable threshold voltage tranSistors after the resumption of power from said power supply means to said volatile flip-flop circuit, for negatively decreasing the threshold voltage of the nonvolatile variable threshold voltage transistor whose threshold voltage was negatively increased.

Claim 13

A nonvolatile flip-flop memory cell circuit comprising: a. a volatile flip-flop circuit having a first bistable terminal with a first or second stable voltage value and a second bistable terminal with a second or first stable voltage value to provide the volatile flip-flop circuit with two stable states; b. a first nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a first nonvolatile variable threshold voltage transistor connected to the first bistable terminal; c. a second nonvolatile variable threshold voltage transistor having a source electrode, a drain electrode, and a gate electrode, the source electrode of a second nonvolatile variable threshold voltage transistor connected to the second bistable terminal; d. power supply means connected across said volatile flip-flop circuit for supplying power thereto, thereby holding the volatile flip-flop circuit in one of its two stable states; e. a drain voltage means connected to the drain electrode of each nonvolatile variable threshold voltage transistor for applying a drain voltage to the drain electrode of each nonvolatile variable threshold voltage transistor; f. a power supply sensing switch means coupled to the power supply means for allowing the passage of a gate writing voltage as the power supply means begins to fail; g. a gate writing voltage means connectable through the power supply sensing switch means to the gate electrode of each nonvolatile variable threshold voltage transistor for negatively increasing the threshold voltage of the nonvolatile variable threshold voltage MNOS transistor whose source electrode is connected to the bistable terminal of the volatile flip-flop circuits which is at the less negative voltage value, as the power supply means begins to fail to deliver power to the volatile flip-flop circuit; h. a gate reading voltage means connectable to the gate electrodes of said nonvolatile variable threshold voltage transistors just before the resumption of power from said power supply means to said volatile flip-flop circuit for turning on the nonvolatile variable threshold voltage transistor whose threshold voltage was not negatively increased prior to the turning on of the nonvolatile variable threshold voltage transistor whose threshold voltage was negatively increased to reset the volatile flip-flop circuit to the state which it had prior to the loss of power thereto; and i. a gate voltage erasing means connectable to the gate electrodes of said nonvolatile variable threshold voltage tranSistors after the resumption of power from said power supply means to said volatile flip-flop circuit, for negatively decreasing the threshold voltage of the nonvolatile variable threshold voltage transistor whose threshold voltage was negatively increased.

Claim 14

An array of nonvolatile flip-flop memory cells for nonvolatilely holding a binary bit of information within each cell thereof without power being applied thereto, comprising: a. an array of volatile flip-flop circuits, each volatile flip-flop circuit having two bistable terminals, the array of volatile flip-flop circuits being used for storing several binary bits of information therein while power is applied thereto; and b. an array of first and second nonvolatile memory means, each first and second nonvolatile memory means being connected to the two bistable terminals of each of said volatile memory means, said array of first and second nonvolatile memory means being used for nonvolatilely holding the voltage values of the two bistable terminals of the bistable memory means during the absence of power to the array.

Claim 15

An array of nonvolatile flip-flop memory cells for nonvolatilely holding a binary bit of information within each cell thereof without power being applied thereto, comprising: a. an array of volatile flip-flop circuits, each volatile flip-flop circuit having two bistable terminals, the array of volatile flip-flop circuits being used for storing several binary bits of information therein while power is applied thereto; and b. an array of first and second nonvolatile memory means, each first and second nonvolatile memory means being connected to the two bistable terminals of each of said volatile memory means, said array of first and second nonvolatile memory means being used for nonvolatilely holding the voltage values of the two bistable terminals of the bistable memory means during the absence of power to the array.

Claim 16

The array of claim 9 wherein the nonvolatile memory means are nonvolatile variable threshold voltage field effect transistors.

Claim 17

The array of claim 9 wherein the nonvolatile variable threshold voltage field effect transistors are nonvolatile MNOS field effect transistors.

Claim 18

A nonvolatile memory cell for nonvolatilely holding a binary bit of information therein without power being applied thereto, comprising: a. a volatile bistable memory means having a bistable terminal therein, for storing a binary bit of information therein and reading binary information thereout while power is applied thereto; and b. a nonvolatile memory means connected to said bistable terminal of said volatile bistable memory means for nonvolatilely storing the voltage value of said bistable terminal of said volatile bistable memory means during the loss of power to the volatile bistable memory means, so that said binary bit of information is nonvolatilely stored in said nonvolatile memory means during the absence of power to the volatile bistable memory means.

Claim 19

A nonvolatile memory cell for nonvolatilely holding a binary bit of information therein without power being applied thereto, comprising: a. a volatile bistable memory means having a bistable terminal therein, for storing a binary bit of information therein and reading binary information thereout while power is applied thereto; and b. a nonvolatile memory means connected to said bistable terminal of said volatile bistable memory means for nonvolatilely storing the voltage value of said bistable terminal of said volatile bistable memory means during the loss of power to the volatile bistable memory means, so that said binary bit of information is nonvolatilely stored in said nonvolatile memory means during the absence of power to the volatile bistable memory means.

Claim 20

The nonvolatile memory cell of claim 12 wherein the volatile bistable memory means is a volatile flip-flop circuit.

Claim 21

The nonvolatile memory cell of claim 12 wherein the nonvolatile memory means is a nonvolatile transistor which has a variable threshold voltage, said nonvolatile transistor therefore being able to nonvolatilely store the voltage value of said bistable terminal of said volatile bistable memory means during the loss of power to volatile bistable memory means.

Claim 22

The nonvolatile memory cell of claim 14 wherein said nonvolatile transistor is a nonvolatile MNOS transistor which has a variable threshold voltage, said nonvolatile MNOS transistor being able to nonvolatilely store the voltage value of said bistable terminal of said volatile bistable memory means during the loss of power to the volatile bistable memory means.