Jitter free trigger pulse generator

Abstract

Abstract In a trigger pulse generator for an oscillator jitter is liable to occur in the trigger pulses because of uncertainties in the timing of the end of the hold-off signal relative to the instants at which a trigger signal reaches a trigger level. Jitter is eliminated by arming an output circuit when the hold-off signal ends and a first pre-trigger pulse is generated in response to the trigger signal reaching the trigger level. The output circuit generates a trigger pulse, when it is armed, in response to a second pre-trigger pulse which is generated in timed relation to the trigger signal reaching the same trigger level, either that is by delaying the first pre-trigger pulse a predetermined amount or by generating the first and second pretrigger pulses off opposite going edges respectively of the squared trigger signal. This invention relates to a trigger pulse generator of the kind which provides trigger pulses in response to selected cycles only of a periodic signal, which will be called the trigger signal, and in response to the trigger signal attaining a trigger level in the selected cycles. The pulse generator can also be used, in known manner, with an aperiodic or one-shot trigger signal, but this is a distinction relating to the use, rather than the construction of the circuit and for simplicity, all further description is given in terms of a periodic trigger signal. A trigger pulse generator has its primary field of application in triggering the horizontal time base circuit of an oscilloscope. The generation of trigger pulses in intervening cycles is prevented by a hold-off signal of predetermined duration. The falling edge of this signal can also be called the rising edge of an arming signal which arms the generator so that it can generate a trigger pulse when the trigger signal next attains the trigger level. The terms falling and rising are used in a logical connotation, not to imply any particular signal polarities. If pulses, which will be called pre-trigger pulses, are derived from the trigger signal every time it reaches the trigger level, it can be arranged to provide a trigger pulse from a pre-trigger pulse only when the arming signal has arrived. The hold-off signal is then re-established. These techniques are well known in themselves and the effect is that a trigger pulse is generated for every N''th pre-trigger pulse where N is a integer determined by the length of the holdoff signal. The rising edge of the arming signal is not however a sharp edge positioned clearly in between two pre-trigger pulses. In practical circuits, it appears, at the frequency of the pretrigger pulses, as a slow edge or ramp which is furthermore subject to some time-positional variation with respect to the N''th pre-trigger pulse. The generator is conjointly responsive to the arming signal and the N''th pre-trigger pulse to generate the trigger pulse and, whatever the actual circuit employed, the situation can be Regarded as if the pre-trigger pulses are superimposed on the arming ramp and a trigger pulse is generated when the composite signal reaches a trigger level. The N''th pretrigger pulse necessarily has finite width and, in the above described situation, it is variably positioned on a ramp. There is then necessarily jitter in the time at which the composite signal reaches the trigger level and hence in the time of the resulting trigger pulse. The spread of the jitter is of the order of the pre-trigger pulse width. This jitter leads to an unstable display in an oscilloscope, and if excessive can cause the integer N to vary. It has already been proposed to overcome the problem of jitter by using the hold-off circuit to arm a first trigger circuit which, when it triggers, arms a second trigger circuit. The two circuits have different trigger levels, whereby there is a delay between the two circuits firing. Although there will be jitter in the timing of the first circuit, if the delay is suitable, the jitter will be substantially eliminated when the second circuit fires. However the length of the delay is a function of the difference between the trigger levels and of the frequency and waveform of the trigger signal. The latter factors are obviously variable and it is necessary to provide controls for adjusting both trigger levels to get reliable operation for any given trigger signal. The adjustment of these controls is tedious and readjustments have to be effected frequently, making the oscilloscope troublesome to use. The object of this invention is to provide an improved trigger pulse generator which will substantially reduce the jitter without expensive circuit complications. The invention is characterized by a pre-trigger circuit responsive to the trigger signal to generate pairs of first and second pre-trigger pulses, the timing of both of which is determined in relation to passage of the trigger signal through the same threshold level and which respectively switch the two state circuit and cause the output circuit to provide the trigger pulse. Although, for the reasons explained above, there will be jitter in the timing of the said switch from the first state to the second state, the timing of the trigger pulse is determined solely by the timing of the second pre-trigger pulse, assuming that the two-state circuit has settled properly within the predetermined delay. This is what is meant by saying that this circuit switches rapidly. In one embodiment the pre-trigger circuit is responsive to the trigger signal to generate a first pre-trigger pulse followed after a predetermined delay by a second pre-trigger pulse, each time the trigger signal attains the threshold level. In a particular example of this embodiment of the invention, the second pre-trigger pulse resets the two-state circuit to its first state, the output circuit responding to this resetting to yield the trigger pulse. It is necessary for the two-state circuit to distinguish between first and second pre-trigger pulses. It is preferred to achieve this by making these pulses of opposite polarity and one way of generating such pulses is to obtain the first pre-trigger pulse conventionally and to feed this forward and also to a shortcircuited delay line which reflects back an inverted pulse. The delay between the second and first pulses is then a predetermined amount equal to twice the delay time of the delay line. A tunnel diode can be used as the two-state circuit. The fast switching times of such diodes are well known. If opposite polarity pre-trigger pulses are used it can be arranged that the first turns the diode ''''off'''' and the second turns it ''''on'''' or vice versa while the hold-off circuit feeds current into the diode to keep it ''''on,'''' or biases it ''''off'''' for the duration of the hold-off signal, as the case may be. In a second embodiment of the invention the pre-trigger circuit is responsIve to the trigger signal to generate first and second pre-trigger pulses when the trigger signal passes through the threshold level in opposite directions respectively. Thus the trigger signal can be squared and the pre-trigger pulses can be generated off the squared signal by differentiating means. The invention in both embodiments has the common feature that the first and second pre-trigger pulses are both timed in relation to passage of the trigger signal through the same preset level, either because there is a predetermined delay between the first and second pulse of each pair, or because the first and second pulses occur when the trigger signal goes through the same threshold level in opposite directions respectively. This has the advantage that the operation of the circuit is substantially uninfluenced by changes in the waveform or frequency of the trigger signal.

Inventors

• 👤 John Harold Conrad
• 👤 Anthony Edward St Aub Reynolds
• 👤 Edward George Gadd

Bibliographic Details