US3676661A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage-time-voltage computation circuit using r-c exponential decay circuits to perform multiplication, division, root-finding and logarithmic conversion
Assignee: Individual
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Filing: 1970-05-05
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Granted: 1972-07-11
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Expires: 1990-05-05
Abstract
Abstract A new class of linear circuits can multiply and divide, find powers and roots, and perform both logarithmic and antilogarithmic conversions. The circuits convert incoming voltages into logarithmically related time intervals and simultaneously convert the time intervals back into antilogarithmically related voltages. Resistor-capacitor exponential decay circuits perform the voltage-time and timevoltage conversions under the control of comparators and switches.
Inventors
- 👤 James A Sprowl
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 05:17
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/161; G06G7/20; G06G7/24
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
129 words
A computational circuit comprising; an exponential circuit; initializing means for placing said exponential circuit in an initial state; and timing means for measuring the time interval which is required for said exponential circuit to change from said initial state to a specified final state, said timing means comprising a capacitor, a source of charging current for said capacitor, a gate controlling the flow of charging current to said capacitor, and comparator means for closing said gate when the state of said circuit is between said initial and said final states and for opening said gate when the state of said circuit is beyond said final state; whereby said time interval, as indicated by the charge on said capacitor, is proportional to the logarithm of said initial and final states.
Claim 2
Dependent Claim
129 words
A computational circuit comprising; an exponential circuit; initializing means for placing said exponential circuit in an initial state; and timing means for measuring the time interval which is required for said exponential circuit to change from said initial state to a specified final state, said timing means comprising a capacitor, a source of charging current for said capacitor, a gate controlling the flow of charging current to said capacitor, and comparator means for closing said gate when the state of said circuit is between said initial and said final states and for opening said gate when the state of said circuit is beyond said final state; whereby said time interval, as indicated by the charge on said capacitor, is proportional to the logarithm of said initial and final states.
Claim 3
Dependent Claim
19 words
A computational circuit in accordance with claim 1 wherein the exponential circuit is a resistor connected to a capacitor.
Claim 4
Dependent Claim
138 words
A computational circuit comprising: an exponential circuit; initializing means for placing said exponential circuit in an initial state; and timing means for measuring the time interval which is required for said exponential circuit to change from said initial state to a specified final state, said timing means comprising a second exponential circuit, second initializing means for placing said second circuit in a second initial state simultaneously with the initializing of said first circuit, and comparator means including state recording means for recording the state of said second circuit when said first circuit reaches said final state; whereby the recorded state of said second circuit is equal to the second initial state multiplied by the ratio of the initial and final states of the first circuit raised to a power equal to the ratio of the circuit time constants.
Claim 5
Dependent Claim
138 words
A computational circuit comprising: an exponential circuit; initializing means for placing said exponential circuit in an initial state; and timing means for measuring the time interval which is required for said exponential circuit to change from said initial state to a specified final state, said timing means comprising a second exponential circuit, second initializing means for placing said second circuit in a second initial state simultaneously with the initializing of said first circuit, and comparator means including state recording means for recording the state of said second circuit when said first circuit reaches said final state; whereby the recorded state of said second circuit is equal to the second initial state multiplied by the ratio of the initial and final states of the first circuit raised to a power equal to the ratio of the circuit time constants.
Claim 6
Dependent Claim
17 words
A computational circuit in accordance with claim 3 wherein the exponential circuits comprise resistances connected to capacitors.
Claim 7
Dependent Claim
162 words
A computational circuit comprising: an exponential circuit including a resistance and a first capacitance; initializing means for charging said first capacitance to an initial, non-zero state of charge; switching means for connecting said resistance to said first capacitance; and time measurement means connected to said switching means for actuating said switching means for a fixed period of time, said time measurement means comprising a second capacitance, a current source for charging said second capacitance, second initializing means for giving said second capacitance a first charge state when said exponential circuit is initialized, and comparator means connecting to said switching means for actuating said switching means for the time it takes the current source to alter the charge on said second capacitance from the first charge state to a second charge state; whereby the charge remaining on said first capacitance after operation of the time measurement means is proportional to the initial first capacitance charge multiplied by the antilogarithm of the time interval.
Claim 8
Dependent Claim
162 words
A computational circuit comprising: an exponential circuit including a resistance and a first capacitance; initializing means for charging said first capacitance to an initial, non-zero state of charge; switching means for connecting said resistance to said first capacitance; and time measurement means connected to said switching means for actuating said switching means for a fixed period of time, said time measurement means comprising a second capacitance, a current source for charging said second capacitance, second initializing means for giving said second capacitance a first charge state when said exponential circuit is initialized, and comparator means connecting to said switching means for actuating said switching means for the time it takes the current source to alter the charge on said second capacitance from the first charge state to a second charge state; whereby the charge remaining on said first capacitance after operation of the time measurement means is proportional to the initial first capacitance charge multiplied by the antilogarithm of the time interval.
Claim 9
Dependent Claim
141 words
A computational circuit comprising: an exponential circuit; initializing means for placing said exponential circuit in an initial, non-zero state; state recording means for recording the final state of said circuit; and time measurement means energized when said exponential circuit is initialized for energizing said state recording means after a fixed period of time elapses following tHe initialization of said circuit, said time measurement means comprising at least one additional exponential circuit, initializing means for placing each of said additional circuits in a plurality of first states and for energizing a first of said additional circuits simultaneously with the initialization of said original exponential circuit, and comparator means for sequentially energizing said additional circuits one after another as each reaches a predetermined second state, and for energizing the state recording means when the last additional circuit has reached its predetermined second state.
Claim 10
Dependent Claim
141 words
A computational circuit comprising: an exponential circuit; initializing means for placing said exponential circuit in an initial, non-zero state; state recording means for recording the final state of said circuit; and time measurement means energized when said exponential circuit is initialized for energizing said state recording means after a fixed period of time elapses following tHe initialization of said circuit, said time measurement means comprising at least one additional exponential circuit, initializing means for placing each of said additional circuits in a plurality of first states and for energizing a first of said additional circuits simultaneously with the initialization of said original exponential circuit, and comparator means for sequentially energizing said additional circuits one after another as each reaches a predetermined second state, and for energizing the state recording means when the last additional circuit has reached its predetermined second state.
Claim 11
Dependent Claim
17 words
A computational circuit in accordance with claim 6 wherein the exponential circuits comprise resistors connected to capacitors.
Claim 12
Dependent Claim
87 words
A nonlinear transformation computational circuit comprising: at least one voltage time computational circuit means for converting an incoming signal into at least one logarithmically related time interval; two or more time-voltage computational circuit means having two or more different time constants for converting the time intervals back into a second array of antilogarithmically related signals; and second signal multiplying and summing means for weighting the second signals by multiplying the second signals by constants and for then summing the weighted second signals to form an output signal.
Claim 13
Dependent Claim
87 words
A nonlinear transformation computational circuit comprising: at least one voltage time computational circuit means for converting an incoming signal into at least one logarithmically related time interval; two or more time-voltage computational circuit means having two or more different time constants for converting the time intervals back into a second array of antilogarithmically related signals; and second signal multiplying and summing means for weighting the second signals by multiplying the second signals by constants and for then summing the weighted second signals to form an output signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-07-11 | 1976-01-10 | 1976-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-07-11 | 1980-01-10 | 1980-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-07-11 | 1984-01-10 | 1984-07-11 | $7700.00 | Window Closed / Lapsed |