US3673508A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Solid state operational amplifier
Assignee: Texas Instruments Inc
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Filing: 1970-08-10
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Granted: 1972-06-27
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Expires: 1990-08-10
Abstract
Abstract A low input current, high response rate solid state operational amplifier is provided by coupling low input current emitter follower circuits to the inputs of a differential amplifier circuit which has been gain stabilized by the use of multiple collector transistors and current feedback.
Inventors
- 👤 Michael J Callahan Jr
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 01:58
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/34; H03F3/00; H03F3/45; H03F3/45071
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
146 words
A solid state amplifier system having a differential output comprising in combination: a. first and second emitter follower input circuits having their input electrodes respectively coupled to first and second input terminals of the amplifier system; b. first and second multiple collector transistors having 1. their emitter electrodes coupled to a first voltage source; 2. one of their collector electrodes coupled to a second voltage source through a respective output load circuit; 3. another of their collector electrodes coupled back to their respective base electrode to form a current feedback loop therefor; and 4. their base electrodes respectively coupled to the output terminal of said first and second input circuits, said multiple transistor circuits forming a differential voltage stage of said amplifier system; and c. first and second output terminals respectively coupled across said output load circuits, thereby providing an amplifier system having a differential output.
Claim 2
Dependent Claim
146 words
A solid state amplifier system having a differential output comprising in combination: a. first and second emitter follower input circuits having their input electrodes respectively coupled to first and second input terminals of the amplifier system; b. first and second multiple collector transistors having 1. their emitter electrodes coupled to a first voltage source; 2. one of their collector electrodes coupled to a second voltage source through a respective output load circuit; 3. another of their collector electrodes coupled back to their respective base electrode to form a current feedback loop therefor; and 4. their base electrodes respectively coupled to the output terminal of said first and second input circuits, said multiple transistor circuits forming a differential voltage stage of said amplifier system; and c. first and second output terminals respectively coupled across said output load circuits, thereby providing an amplifier system having a differential output.
Claim 3
Dependent Claim
17 words
one of their collector electrodes coupled to a second voltage source through a respective output load circuit;
Claim 4
Dependent Claim
17 words
one of their collector electrodes coupled to a second voltage source through a respective output load circuit;
Claim 5
Dependent Claim
34 words
The amplifier system of claim 1 and further including first and second substantially matched constant current sources respectively coupled to said first and second emitter follower input circuits for supplying emitter biasing currents thereto.
Claim 6
Dependent Claim
32 words
The amplifier system of claim 1 and further including a constant current source coupled to the emitter electrodes of said first and second multiple collector transistors for supplying emitter biasing currents thereto.
Claim 7
Dependent Claim
20 words
another of their collector electrodes coupled back to their respective base electrode to form a current feedback loop therefor; and
Claim 8
Dependent Claim
20 words
another of their collector electrodes coupled back to their respective base electrode to form a current feedback loop therefor; and
Claim 9
Dependent Claim
52 words
their base electrodes respectively coupled to the output terminal of said first and second input circuits, said multiple transistor circuits forming a differential voltage stage of said amplifier system; and c. first and second output terminals respectively coupled across said output load circuits, thereby providing an amplifier system having a differential output.
Claim 10
Dependent Claim
52 words
their base electrodes respectively coupled to the output terminal of said first and second input circuits, said multiple transistor circuits forming a differential voltage stage of said amplifier system; and c. first and second output terminals respectively coupled across said output load circuits, thereby providing an amplifier system having a differential output.
Claim 11
Dependent Claim
38 words
The amplifier system of claIm 1 wherein said output load circuits respectively include first and second load resistors respectively coupled between the one collector electrode of said first and second multiple collector transistors and said second voltage source.
Claim 12
Dependent Claim
139 words
The amplifier system of claim 1 wherein said output load circuits respectively include first and second series connected resistor and transistor circuit respectively connected between the one collector electrode of said first and second multiple collector transistors and said second voltage source, and further includes a third series-connected resistor and transistor circuit coupled between said first and second voltage sources, wherein the input terminals of the transistors of said first and second series connected resistor and transistor circuits are coupled to the common junction of said third series connected resistor and transistor circuit, and wherein the input terminal of said third series connected resistor and transistor circuit is coupled to said first output terminal for combining the output signals produced by said differential voltage stage, whereby the output signal on said second output terminal is a single-ended output signal.
Claim 13
Dependent Claim
32 words
The amplifier system of claim 1 and further includes first and second overvoltage signal protection circuits respectively coupled between said first and second emitter follower input circuits and said first voltage source.
Claim 14
Dependent Claim
20 words
The amplifier system of claim 6 wherein said overvoltage signal protection circuits each include a transistor connected as a diode.
Claim 15
Dependent Claim
20 words
The amplifier system of claim 6 wherein said overvoltage signal protection circuits respectively include second and third multiple collector transistors.
Claim 16
Dependent Claim
23 words
The amplifier system of claim 1 wherein said first and second emitter follower circuits include two transistors connected in an emitter follower configuration.
Claim 17
Dependent Claim
52 words
The amplifier system of claim 2 wherein said first and second constant current sources include a series connected resistor and transistor circuit respectively coupled between said first and second emitter follower input circuits and said second voltage source, with the base terminal of the transistor thereof being coupled to third voltage source.
Claim 18
Dependent Claim
31 words
The amplifier system of claim 3 wherein said third constant current source includes a series connected resistor and transistor circuit coupled between said first voltage source and said differential amplifier stage.
Claim 19
Dependent Claim
28 words
The amplifier system of claim 5 and further including a power amplifier coupled to said second output terminal for providing a substantially accurate and relatively stable operational amplifier.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-27 | 1975-12-27 | 1976-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-27 | 1979-12-27 | 1980-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-27 | 1983-12-27 | 1984-06-27 | $7700.00 | Window Closed / Lapsed |