Abstract This specification discloses a high-speed pulse delaying circuit having its extremely slight minimal delay and adapted for use as a time-base circuit for a wideband oscilloscope. The pulse delay circuit comprises essentially an integrator consisting of a resistor, a capacitor and a grounded resistor connected to the capacitor in series and a high-speed pulse generator using an avalanche transistor. The grounded resistor has such a low resistance that the waveform of the integrator output resulting from the integration of a rectangular input pulse has a sharp rising portion at a position corresponding to the leading edge of the rectangular pulse, thereby to reduce the minimal delay time. Provision of a voltage adjustment circuit is made for varying the emitter potential of the avalanche transistor to vary the delay time.
Inventors
👤 Tsuyoshi Konno
👤 Katsuo Nakazato
👤 Satoshi Ise
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-28 07:18
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/335
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
108 words
A high-speed pulse delaying circuit comprising: an integrator including a resistor connected to the input terminal of the delaying circuit and a series combination of a capacitor and a grounded rEsistor having a resistance of several percent of that of the resistor connected to the input terminal of the delaying circuit so that the wavefore of the integrator output resulting from the integration of a rectangular pulse has a sharp rising portion at a position corresponding to the leading edge of the rectangular pulse; and a high-speed pulse generator using an avalanche transistor, the input of said pulse generator being connected to the input terminal and said capacitor.
Claim 2
Dependent Claim
108 words
A high-speed pulse delaying circuit comprising: an integrator including a resistor connected to the input terminal of the delaying circuit and a series combination of a capacitor and a grounded rEsistor having a resistance of several percent of that of the resistor connected to the input terminal of the delaying circuit so that the wavefore of the integrator output resulting from the integration of a rectangular pulse has a sharp rising portion at a position corresponding to the leading edge of the rectangular pulse; and a high-speed pulse generator using an avalanche transistor, the input of said pulse generator being connected to the input terminal and said capacitor.
Claim 3
Dependent Claim
42 words
A high-speed pulse delaying circuit according to claim 1, further comprising a voltage adjustment circuit having a transistor and a variable resistor for adjusting the potential at the emitter of said avalanche transistor to vary the delay time of said delaying circuit.