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US3668693A
Expired / Lapsed
US
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Analog-to-digital converter
Assignee: Singer Co
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Filing: 1970-07-20
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Granted: 1972-06-06
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Expires: 1990-07-20
Abstract
Abstract An analog-to-digital converter is provided for converting analog signals representing the sine and cosine of an angle into a 14 bit binary digital output signal from an up-down counter. Selected groups of bits from the counter control attenuation networks which generate an analog representation of the angular value to which the counter is set. The first group of bits, comprising the three most significant bits, controls an octant selection network. A second group of bits, comprising the next three most significant bits, controls two ladder attenuation networks which generate analog representations of the tangent of the portion of the angle in the counter represented by this group of bits. A third group of bits, comprising the remaining bits from the counter output, is employed to control a third ladder attenuation network which generates an analog representation of the portion of the angle in the counter represented by the third group of bits. The octant selection network and three ladder attenuation networks are arranged to modify the two-phase analog input signals to produce an a-c analog error signal representing the magnitude and sense of the angular deviation between the counter setting and the angle represented by the analog input signals. The AC error signal is multiplied by a carrier voltage in a phase-sensitive demodulator to produce a bipolar DC signal which is then applied to a bipolar voltage-to-frequency converter. The output of the voltage-to-frequency converter consists of two series of pulses which are employed to drive the up-down counter to a null setting wherein it produces a binary digital output signal representing the angle defined by the analog input signals.
Inventors
- 👤 Bradley C Eaton
- 👤 Marvin Masel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 14:24
CPC Classifications
H; H03; H03K; H03K7/00; H03K7/06; H03M; H03M1/00; H03M1/06; H03M1/08
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
402 words
An analog-to-digital converter for converting first and second analog input signals representing an angle into binary digital output signals representing said angle comprising: counter means having an input and an output and operable to produce binary digital output signals representing the estimaged value of said angle; octant selection means coupled to the output of said counter means for control thereby and having an input adapted to receive said first and second analog input signals, said octant selector means operable in response to a first group of the most significant bits of said binary digital output signals to modify said first and second analog input signals to produce an output of third and fourth signals respectively representing the cosine and sine of the deviation between the true value of said angle and the portion of the estimaged angle in the counter represented by said first group of bits; digitally controlled circuit means coupled to at least a portion of the output of said counter means for control thereby and having an input adapted to receive said third and fourth signals to produce an output including an AC analog error signal having an amplitude and phase respectively representing the magnitude and sense of the difference between the estimated and true values of said angle; said digitally controlled circuit means further including first and second attenuation network means operable in response to a second group of the next most significant bits of said binary digital output signals to multiply the said third and fourth signals from the octant selection means by the tangent of the portion of the estimated angle in the counter means represented by said second group of bits, to thereby produce fifth and sixth signals respectively; phase-sensitive demodulator means coupled to the output of said circuit means for multiplying said AC error signal by an AC reference signal to produce DC output signals having a magnitude and polarity respectively representing the amplitude and phase of said AC error signal; and bipolar voltage-to-frequency converter means coupled between the output of said demodulator means and the input of said counter means for converting said DC output signals into digital pulse output signals having a pulse repetition rate representing the magnitude of said DC signals, whereby said digital pulse output signals drive said counter means to a null setting wherein the binary digital output from the counter means represents the true value of said angle.
Claim 2
Dependent Claim
402 words
An analog-to-digital converter for converting first and second analog input signals representing an angle into binary digital output signals representing said angle comprising: counter means having an input and an output and operable to produce binary digital output signals representing the estimaged value of said angle; octant selection means coupled to the output of said counter means for control thereby and having an input adapted to receive said first and second analog input signals, said octant selector means operable in response to a first group of the most significant bits of said binary digital output signals to modify said first and second analog input signals to produce an output of third and fourth signals respectively representing the cosine and sine of the deviation between the true value of said angle and the portion of the estimaged angle in the counter represented by said first group of bits; digitally controlled circuit means coupled to at least a portion of the output of said counter means for control thereby and having an input adapted to receive said third and fourth signals to produce an output including an AC analog error signal having an amplitude and phase respectively representing the magnitude and sense of the difference between the estimated and true values of said angle; said digitally controlled circuit means further including first and second attenuation network means operable in response to a second group of the next most significant bits of said binary digital output signals to multiply the said third and fourth signals from the octant selection means by the tangent of the portion of the estimated angle in the counter means represented by said second group of bits, to thereby produce fifth and sixth signals respectively; phase-sensitive demodulator means coupled to the output of said circuit means for multiplying said AC error signal by an AC reference signal to produce DC output signals having a magnitude and polarity respectively representing the amplitude and phase of said AC error signal; and bipolar voltage-to-frequency converter means coupled between the output of said demodulator means and the input of said counter means for converting said DC output signals into digital pulse output signals having a pulse repetition rate representing the magnitude of said DC signals, whereby said digital pulse output signals drive said counter means to a null setting wherein the binary digital output from the counter means represents the true value of said angle.
Claim 3
Dependent Claim
74 words
An analog-to-digital converter as claimed in claim 3, wherein said digitally controlled circuit means further comprises third attenuation network means operable in response to a third group of bits consisting of the remaining bits of said binary digital output signals to multiply the sum of said third and sixth signals by the portion of the estimated angle in the counter means represented by said third group of bits, to thereby produce a seventh signal.
Claim 4
Dependent Claim
43 words
An analog-to-digital converter as claimed in claim 2, wherein said digitally controlled circuit means further comprises summing means for summing said seventh signal with an eighth signal representing the difference between said fourth and fifth signals to thereby produce said AC error signal.
Claim 5
Dependent Claim
28 words
An analog-to-digital converter as claimed in claim 3, wherein said first, second and third attenuation network means comprise digitally controlled ladder networks formed by switch-controlled parallel circuit branches.
Claim 6
Dependent Claim
47 words
An analog-to-digital converter as claimed in claim 4, wherein said first group of bits comprises the three most significant bits of a 14 bit output from said counter means and said second group of bits comprises the next three most significant bits of said fourteen bit output.
Claim 7
Dependent Claim
129 words
An analog-to-digital converter as claimed in claim 1, wherein said first and second analog input signals comprise a first AC input signal hAving the form cos theta T and a second AC input signal having the form sin theta T, and wherein said AC error signal has the form sin ( theta T- Mu )( Beta tan Alpha -1) + cos ( theta T- Mu )(tan Alpha + Beta ), where theta T is the true value of said angle, Mu is proportional to a group of the most significant bits of said binary digital output signals, Alpha is proportional to a group of the next most significant bits of said binary digital output signals, and Beta is proportional to the remaining bits of said binary digital output signals.
References Cited (Backward Citations)
US3325805A
Cited
US3508252A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-06 | 1975-12-06 | 1976-06-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-06 | 1979-12-06 | 1980-06-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-06 | 1983-12-06 | 1984-06-06 | $7700.00 | Window Closed / Lapsed |