Transducer amplifier system

Claim 2

An amplifier system comprising an input stage in the form of a difference amplifier for receiving a differential input signal, said difference amplifier comprising first and second transistors, the bases of which comprise a first pair of input terminals, the emitters of which comprise a second pair of input terminals, and the collectors of which comprise a first pair of output terminals, said first pair of input terminals receiving said differential input signal, a single gain-setting resistor being connected across said second pair of input terminals, each of said first pair of output terminals being connected to a voltage source by a corresponding one of a pair of equal-valued load resistors; a main operational amplifier connected to said first pair of output terminals from said input stage, said main operational amplifier possessing a single-ended output terminal, the difference in current through said load resistors in response to an unbalance of current flow in said first pair of output terminals providing a difference voltage to said main operational amplifier, said differential input signal providing an initial unbalance of current flow in said first pair of output terminals to provide said initial difference voltage which, in turn, is amplified by said main operational amplifier to provide said output voltage signal; and an active feedback differential amplifier possessing a third pair of input terminals and a second pair of output terminals, one of said third pair of input terminals being connected to said single-ended output terminal of said main operational amplifier, the other of said third pair of input terminals being connected to a source of reference potential, and said second pair of output terminals being connected to said second pair of input terminals to said input stage, said feedback differential amplifier producing on each of said second pair of output terminals a current which passes through said single gain-setting resistor generating a feed-back voltage across said single gain-setting resistor to substantially restore the balance of current flow in said first pair of output terminals from said difference amplifier, said feedback differential amplifier producing a feedback voltage across said single gainsetting resistor linearly proportional to the output voltage from said main operational amplifier.

Claim 3

An amplifier system comprising an input staGe in the form of a difference amplifier for receiving a differential input signal, said input stage containing a first pair and a second pair of input terminals and a first pair of output terminals; a main operational amplifier connected to said first pair of output terminals from said input stage, said main operational amplifier possessing a single-ended output terminal; and an active differential amplifier possessing a third pair of input terminals and a second pair of output terminals, one of said third pair of input terminals being connected to said single-ended output terminal of said main operational amplifier, the other of said third pair of input terminals being connected to a source of reference potential, and said second pair of output terminals being connected to said second pair of input terminals to said input stage, said active feedback differential amplifier comprising a differential input circuit possessing said third pair of input terminals and, in addition, a fourth pair of input terminals; and a third pair of output terminals, said differential input circuit rejecting signals common to the terminals in said third pair of input terminals; a multi-stage differential amplifier possessing a fifth pair of input terminals and a fourth pair of output terminals, said fifth pair of input terminals being connected to said third pair of output terminals from said differential input circuit; and first and second transistor pairs the first transistor in each pair having its base connected to a corresponding one of said fourth pair of output terminals thereby to generate on the collector terminals of the first transistors in each pair of first and a second current, any unbalance therebetween defining said differential feedback current, the collector of said first transistor in each pair being connected to a corresponding one of said fourth pair of input terminals and the emitter of said first transistor in each pair being connected to a selected potential through resistors, and the second transistor in each pair having its base also connected to a corresponding one of said fourth pair of output terminals to generate, respectively, feedback currents to said second pair of input terminals to said input stage substantially identical to said first and second currents, the collectors of said second transistors in each pair being connected to corresponding ones of said second pair of input terminals to thereby linearize and establish an accurate differential transconductance characteristic in said feedback amplifier and establish substantially ideal differential current generator outputs, and the emitters of said second transistor in each pair being connected to said selected potential through load resistors.

Claim 4

An amplifier system comprising an input staGe in the form of a difference amplifier for receiving a differential input signal, said input stage containing a first pair and a second pair of input terminals and a first pair of output terminals; a main operational amplifier connected to said first pair of output terminals from said input stage, said main operational amplifier possessing a single-ended output terminal; and an active differential amplifier possessing a third pair of input terminals and a second pair of output terminals, one of said third pair of input terminals being connected to said single-ended output terminal of said main operational amplifier, the other of said third pair of input terminals being connected to a source of reference potential, and said second pair of output terminals being connected to said second pair of input terminals to said input stage, said active feedback differential amplifier comprising a differential input circuit possessing said third pair of input terminals and, in addition, a fourth pair of input terminals; and a third pair of output terminals, said differential input circuit rejecting signals common to the terminals in said third pair of input terminals; a multi-stage differential amplifier possessing a fifth pair of input terminals and a fourth pair of output terminals, said fifth pair of input terminals being connected to said third pair of output terminals from said differential input circuit; and first and second transistor pairs the first transistor in each pair having its base connected to a corresponding one of said fourth pair of output terminals thereby to generate on the collector terminals of the first transistors in each pair of first and a second current, any unbalance therebetween defining said differential feedback current, the collector of said first transistor in each pair being connected to a corresponding one of said fourth pair of input terminals and the emitter of said first transistor in each pair being connected to a selected potential through resistors, and the second transistor in each pair having its base also connected to a corresponding one of said fourth pair of output terminals to generate, respectively, feedback currents to said second pair of input terminals to said input stage substantially identical to said first and second currents, the collectors of said second transistors in each pair being connected to corresponding ones of said second pair of input terminals to thereby linearize and establish an accurate differential transconductance characteristic in said feedback amplifier and establish substantially ideal differential current generator outputs, and the emitters of said second transistor in each pair being connected to said selected potential through load resistors.

Claim 5

A system according to claim 2, in which each of said transistor pairs constitutes monolithic dual transistors thereby providing inherent matching of the first and second transistors in each pair.

Claim 6

An amplifier having a high common-mode rejection ratio comprising, in combination; an input stage; a main amplifier means containing differential input terminals; and an active feedback means; said input stage comprising a single gain-setting resistor, and a difference amplifier made up of first and second transistors having input terminals for receiving a differential input signal, output terminals connected to the differential input terminals to said main amplifier means and including equal-valued load resistors, each connecting one of said output terminals to a source of potential, for providing a difference voltage to said main amplifier means in response to an unbalance of current flow in said output terminals, and common terminals connected by said single gain-setting resistor; said feedback means having a set of input leads, a set of common leads and a set of output leads, said set of input leads connected to receive the output voltage signal from said main amplifier means resulting from said differencE voltage, said feedback means comprising means for generating two sets of first and second feedback currents; means for applying the first set of feedback currents to said single gain-setting resistor to generate a voltage across said resistor substantially equal to said differential input signal thereby restoring said balance of current flow in said output terminals from said input stage; and means for applying the second set of feedback currents to a second resistor connected across said set of common leads to generate a voltage across this second resistor substantially equal to the output voltage from said main amplifier means.

Claim 7

An amplifier having a high common-mode rejection ratio comprising, in combination; an input stage; a main amplifier means containing differential input terminals; and an active feedback means; said input stage comprising a single gain-setting resistor, and a difference amplifier made up of first and second transistors having input terminals for receiving a differential input signal, output terminals connected to the differential input terminals to said main amplifier means and including equal-valued load resistors, each connecting one of said output terminals to a source of potential, for providing a difference voltage to said main amplifier means in response to an unbalance of current flow in said output terminals, and common terminals connected by said single gain-setting resistor; said feedback means having a set of input leads, a set of common leads and a set of output leads, said set of input leads connected to receive the output voltage signal from said main amplifier means resulting from said differencE voltage, said feedback means comprising means for generating two sets of first and second feedback currents; means for applying the first set of feedback currents to said single gain-setting resistor to generate a voltage across said resistor substantially equal to said differential input signal thereby restoring said balance of current flow in said output terminals from said input stage; and means for applying the second set of feedback currents to a second resistor connected across said set of common leads to generate a voltage across this second resistor substantially equal to the output voltage from said main amplifier means.

Claim 8

A system according to claim 4, in which said first and second transistors are defined by a bipolar transistor pair having base terminals constituting said input terminals, collector terminals constituting said output terminals, and emitter terminals constituting said common terminals.

Claim 9

A system according to claim 4, in which said first and second transistors comprise field effect transistors having gate terminals constituting said input terminals, drain terminals constituting said output terminals, and source terminals constituting said common terminals, thereby providing a relatively high input impedance for said input stage.

Claim 10

A system according to claim 4, in which said active feedback means includes a differential amplifier; an input circuit made up of third and fourth transistors having input terminals receiving said output voltage signal from said main amplifier means, output terminals connected to the input of said differential amplifier, and common terminals connected across a fixed resistor; and first and second transistor pairs, first transistors in each pair having their base terminals connected to the differential output of said differential amplifier to generate on their collector terminals said first and second feedback currents to the common terminals from said input stage,, and second transistors in each pair having their base terminals connected to said differential output and their collector terminals connected across said fixed resistor to provide first and second currents to said fixed resistor substantially identical to said first mentioned first and second feedback currents, thereby providing a voltage across said fixed resistor substantially equal to the output voltage signal from said main amplifier applied to said input circuit, with the result that said transconductance characteristic of said feedback amplifier means is accurately established and linearized.

Claim 11

A system according to claim 7, in which each of said transistor pairs constitute monolithic dual transistors thereby providing inherent matching of the first and second transistors in each pair.

Claim 12

A system according to claim 7, in which said third and fourth transistors comprise a bipolar transistor pair having base terminals constituting said input terminals, collector terminals constituting said output terminals, and emitter terminals constituting said common terminals.

Claim 13

A system according to claim 7, in which said third and fourth transistors comprise field effect transistors having gate terminals constituting said input terminals, drain terminals constituting said output terminals, and source terminals constituting said common terminals, thereby providing a relatively high imput impedance for said input stage.

Claim 14

A system according to claim 7, including first and second resistance-capacitor means connected across the differential input terminals to said main amplifier means and said differential amplifier in said active feedback means, respectively, to provide phase-gain compensation and thereby to provide loop stability for said system over its operating frequency range.