Low level amplifier

Claim 2

A low level detector-amplifier circuit connected to a source of d.c. signals which vary in magnitude above and below the forward threshold voltage of a detecting transistor which comprises a first detecting transistor having its base and collector electrodes connected with a source of positive biasing potential, a first semiconductor asymmetrically conducting device having voltage and current ratings substantially the same as the voltage and current ratings of the base-emitter junctiOn of said first detecting transistor connected to said source of positive biasing potential, means serially connecting said source of d.c. signals, said first asymmetrically conducting device, and the base-emitter path of said first detecting transistor, said first asymmetrically conducting device being poled for forward conduction in a direction opposite to the forward current flow through the base-emitter path of said first detecting transistor to provide a voltage which is substantially equal in magnitude and opposite in sign from the forward threshold voltage of said first detecting transistor, a second transistor having its base and collector electrodes connected with said source of positive biasing potential, a second semiconductor asymmetrically conducting device, means connecting said second asymmetrically conducting device and the base-emitter path of said second transistor across the collector-emitter path of said first transistor, said second asymmetrically conducting device being poled for forward conduction in a direction parallel to the forward current flow through the base-emitter path of said second transistor, and an output connected to the collector electrode of said second transistor, said input signal source and said output having a common grounded terminal, whereby input signals having a magnitude less than the forward threshold voltage of said first detecting transistor are detected and amplified independent of variations in said source of positive biasing potential.

Claim 3

A low level detector-amplifier in accordance with claim 1 wherein said first asymmetrically conducting device is a third transistor having its base and collector electrodes interconnected to said source of positive biasing potential and its emitter electrode connected to said source of input signal, the voltage and current ratings of said third transistor being substantially the same as the voltage and current ratings of said first transistor, and said second asymmetrically conducting device is a fourth transistor having its base and collector electrodes interconnected to said source of positive biasing potential and its emitter electrode connected to said common grounded terminal, said fourth transistor having voltage and current ratings substantially the same as the voltage and current ratings of said second transistor, each of said first, second, third, and fourth transistors being of the same conductivity type.

Claim 4

A low level detector amplifier in accordance with claim 13 wherein a first resistor connects the collector electrode of said first transistor to said source of positive biasing potential, a second resistor connects the emitter electrode of said first transistor to said common grounded terminal, and the output voltage is related to the input voltage by the ratio of the said first resistor to the said second resistor.

Claim 5

A low level detector-amplifier circuit connected to a source of d.c. signals which vary in magnitude above and below the forward threshold voltage of a detecting transistor which comprises a first detecting transistor having its base and collector electrodes connected with a source of negative biasing potential, a first semiconductor asymmetrically conducting device having voltage and current ratings substantially the same as the voltage and current ratings of the base-emitter junction of said first detecting transistor connected to said source of negative biasing potential, means serially connecting said source of d.c. signals, said first asymmetrically conducting device, and the base-emitter path of said first detecting transistor, said first asymmetrically conducting device being poled for forward conduction in a direction opposite to the forward current flow through the base-emitter path of said first detecting transistor to provide a voltage which is substantially equal in magnitude and opposite in sign from the forward threshold voltage of said first transistor, a second transistor having its base electrode connected to the collector electrode of said first detecting transistor and its collector electrode connected to the emitter electrode of said first detecting transistor, a third transistor having its emitter electrode connected to said source of negative biasing potential, a second semiconductor asymmetrically conducting device having voltage and current ratings substantially the same as the voltage and current ratings of the base-emitter junction of said third transistor connected with said source of negative biasing potential and the emitter electrode of said second transistor, means connecting the base electrode of said third transistor to the emitter electrode of said second transistor, means connecting the collector electrode of said third transistor to a common grounded input-output terminal, said second asymmetrically conducting device being poled for forward conduction in a direction parallel to the forward current flow through the base-emitter path of said third transistor, and a second output terminal connected to the collector electrode of said third transistor, whereby input signals having a magnitude less than the forward threshold voltage of said first detecting transistor are detected and amplified independent of variations in said source of negative biasing potential.

Claim 6

A low level detector-amplifier circuit connected to a source of d.c. signals which vary in magnitude above and below the forward threshold voltage of a detecting transistor which comprises a first detecting transistor having its base and collector electrodes connected with a source of negative biasing potential, a first semiconductor asymmetrically conducting device having voltage and current ratings substantially the same as the voltage and current ratings of the base-emitter junction of said first detecting transistor connected to said source of negative biasing potential, means serially connecting said source of d.c. signals, said first asymmetrically conducting device, and the base-emitter path of said first detecting transistor, said first asymmetrically conducting device being poled for forward conduction in a direction opposite to the forward current flow through the base-emitter path of said first detecting transistor to provide a voltage which is substantially equal in magnitude and opposite in sign from the forward threshold voltage of said first transistor, a second transistor having its base electrode connected to the collector electrode of said first detecting transistor and its collector electrode connected to the emitter electrode of said first detecting transistor, a third transistor having its emitter electrode connected to said source of negative biasing potential, a second semiconductor asymmetrically conducting device having voltage and current ratings substantially the same as the voltage and current ratings of the base-emitter junction of said third transistor connected with said source of negative biasing potential and the emitter electrode of said second transistor, means connecting the base electrode of said third transistor to the emitter electrode of said second transistor, means connecting the collector electrode of said third transistor to a common grounded input-output terminal, said second asymmetrically conducting device being poled for forward conduction in a direction parallel to the forward current flow through the base-emitter path of said third transistor, and a second output terminal connected to the collector electrode of said third transistor, whereby input signals having a magnitude less than the forward threshold voltage of said first detecting transistor are detected and amplified independent of variations in said source of negative biasing potential.

Claim 7

A low level detector-amplifier in accordance with claim 14 wherein said first asymmetrically conducting device is a fourth transistor having its base and collector electrodes connected to said source of negative biasing potential and its emitter electrode connected to said source of input signals, the voltage and current ratings of said fourth transistor being substantially the same as the voltage and current ratings of said first transistor, said second asymmetrically conducting device is a fifth transistor having its base and collector electrodes interconnected, said first and fourth transistors of one conductivity type and said second, third and fifth transistors being of the opposite conductivity type, and means connecting the emitter electrode of said fifth transistor to said source of negative biasing potential, said fifth transistor having voltage and current ratings substantially the same as the voltage and current ratings of said third transistor.

Claim 8

A low level detector amplifier circuit in accordance with claim 14 wherein a first resistor connects the emitter electrode of said first transistor to said common grounded input-output terminal, said means connecting the collector electrode of said third transistor to common grounded input-output terminal comprises a second resistor, and the output voltage signal is approximately equal to the input voltage signal multiplied by the ratio of the resistance of the second resistor to the resistance of the said first resistor.