Fabrication of semiconductor devices with cup-shaped regions

Claim 1

A method for forming an insulated gate field effect semiconductor device comprising the steps of: forming a single substantially cup-shaped region of semiconductor material having one type conductivity between two regions of semiconductor material having the opposite type conductivity from said one type conductivity by diffusing impurity atoms of opposite type conductivities through an opening in an insulating layer into the said semiconductor material until the said cup-shaped region''s width at the surface in contact with said insulating layer is about 0.1 mil or less, said cup-shaped region of semiconductor material having a portion extending toward the surface of the semiconductor material; and providing electrodes for each of said regions of semiconductor material including a control electrode electrically insulated from the surface of semiconductor material and positioned over the portion of said cup-shaped region extending toward the surface of semiconductor material.

Claim 2

A method for forming an insulated gate field effect semiconductor device comprising the steps of: forming a single substantially cup-shaped region of semiconductor material having one type conductivity between two regions of semiconductor material having the opposite type conductivity from said one type conductivity by diffusing impurity atoms of opposite type conductivities through an opening in an insulating layer into the said semiconductor material until the said cup-shaped region''s width at the surface in contact with said insulating layer is about 0.1 mil or less, said cup-shaped region of semiconductor material having a portion extending toward the surface of the semiconductor material; and providing electrodes for each of said regions of semiconductor material including a control electrode electrically insulated from the surface of semiconductor material and positioned over the portion of said cup-shaped region extending toward the surface of semiconductor material.

Claim 3

A method for forming a normally off insulated gate field effect transistor comprising the steps of: forming an opening in an insulating layer located on the surface of a semiconductor wafer; diffusing impurity atoms of opposite type conductivities through said opening into said semiconductor wafer having one of said types of conductivity thereby forming two regions of the same type conductivity separated by a region of opposite type conductivity; continuing said diffusing step until said region of opposite type conductivity at the surface in contact with said insulating layer is about 0.1 mil or less; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of the opposite type conductivity.

Claim 4

A method for forming a normally off insulated gate field effect transistor comprising the steps of: forming an opening in an insulating layer located on the surface of a semiconductor wafer; diffusing impurity atoms of opposite type conductivities through said opening into said semiconductor wafer having one of said types of conductivity thereby forming two regions of the same type conductivity separated by a region of opposite type conductivity; continuing said diffusing step until said region of opposite type conductivity at the surface in contact with said insulating layer is about 0.1 mil or less; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of the opposite type conductivity.

Claim 5

A method for forming a normally on insulated gate field effect transistor comprising the steps of: forming an opening in an insulating layer located on the surface of a semiconductor wafer; diffusing impurity atoms of opposite type conductivities through said opening into said semiconductor wafer having one of said types of conductivity thereby forming two regions of the same type conductivity separated by a region of the opposite type conductivity; oxidizing the surface of said semiconductor wafer causing impurity atoms of the type of conductivity forming the two regions of the same conductivity to pile up at the surface of the semiconductor wafer while the impurity atoms of the type of conductivity forming the intermediate region of the opposite conductivity being absorbed in the oxidized surface, said impurity atoms piled up at the surface of the semiconductor wafer forming a conductive channel between said two regions of the same conductivity type; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of the opposite type conductivity.

Claim 6

A method for forming a normally on insulated gate field effect transistor comprising the steps of: forming an opening in an insulating layer located on the surface of a semiconductor wafer; diffusing impurity atoms of opposite type conductivities through said opening into said semiconductor wafer having one of said types of conductivity thereby forming two regions of the same type conductivity separated by a region of the opposite type conductivity; oxidizing the surface of said semiconductor wafer causing impurity atoms of the type of conductivity forming the two regions of the same conductivity to pile up at the surface of the semiconductor wafer while the impurity atoms of the type of conductivity forming the intermediate region of the opposite conductivity being absorbed in the oxidized surface, said impurity atoms piled up at the surface of the semiconductor wafer forming a conductive channel between said two regions of the same conductivity type; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of the opposite type conductivity.

Claim 7

A method for forming a normally off insulated gate field effect transistor comprising the steps of: forming an opening in an SiO2 layer located on the surface of a semiconductor wafer made of N type sIlicon; diffusing boron atoms through said opening into said semiconductor wafer thereby forming a region of P type conductivity; diffusing phosphorous atoms through said opening into said semiconductor wafer thereby forming a region of N type conductivity at the surface of said semiconductor wafer and forming said region of P type conductivity into a single cup-shaped configuration; continuing said phosphorous diffusion until said region of P type conductivity at the surface in contact with said silicon dioxide is about 0.2 mil or less; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of P type conductivity.

Claim 8

A method for forming a normally off insulated gate field effect transistor comprising the steps of: forming an opening in an SiO2 layer located on the surface of a semiconductor wafer made of N type sIlicon; diffusing boron atoms through said opening into said semiconductor wafer thereby forming a region of P type conductivity; diffusing phosphorous atoms through said opening into said semiconductor wafer thereby forming a region of N type conductivity at the surface of said semiconductor wafer and forming said region of P type conductivity into a single cup-shaped configuration; continuing said phosphorous diffusion until said region of P type conductivity at the surface in contact with said silicon dioxide is about 0.2 mil or less; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of P type conductivity.

Claim 9

A method for forming a normally on insulated gate field effect transistor comprising the steps of: forming an opening in an SiO2 layer located on the surface of a semiconductor wafer made of N type silicon; diffusing boron atoms through said opening into said semi-conductor wafer thereby forming a region of P type conductivity; diffusing phosphorous atoms through said opening into said semiconductor wafer thereby forming a region of N type conductivity at the surface of said semiconductor wafer and forming said region of P type conductivity into a single cup-shaped configuration; oxidizing the surface of said semiconductor wafer causing phosphorous impurity atoms to pile up at the surface of the semi-conductor wafer while the boron impurity atoms are absorbed into the oxidized surface, said phosphorous atoms piled up at the surface of the semiconductor wafer forming a conductive channel between said two regions of the same conductivity type; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of P type conductivity.

Claim 10

A method for forming a normally on insulated gate field effect transistor comprising the steps of: forming an opening in an SiO2 layer located on the surface of a semiconductor wafer made of N type silicon; diffusing boron atoms through said opening into said semi-conductor wafer thereby forming a region of P type conductivity; diffusing phosphorous atoms through said opening into said semiconductor wafer thereby forming a region of N type conductivity at the surface of said semiconductor wafer and forming said region of P type conductivity into a single cup-shaped configuration; oxidizing the surface of said semiconductor wafer causing phosphorous impurity atoms to pile up at the surface of the semi-conductor wafer while the boron impurity atoms are absorbed into the oxidized surface, said phosphorous atoms piled up at the surface of the semiconductor wafer forming a conductive channel between said two regions of the same conductivity type; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of P type conductivity.

Claim 11

A method for forming both normally off and normally on insulated gate field effect transistors in a single semiconductor wafer comprising the steps of: opening a first set of windows in an insulating layer located on the surface of the semiconductor wafer; diffusing impurity atoms of one type conductivity through said first set of windows into a semiconductor wafer having the opposite type conductivity; opening a second set of windows in said insulating layer; diffusing impurity atoms of said one type conductivity through said first and second set of windows in the semiconductor wafer; diffusing impurity atoms of said opposite type conductivity into said semiconductor wafer thereby forming two regions of the same type conductivity separated by a region of the opposite type conductivity; oxidizing the surface of said semiconductor wafer causing impurity atoms of the type of conductivity forming the two regions of the same conductivity to pile up at the surface of the semiconductor wafer while the impurity atoms of the type of conductivity forming the intermediate region of the opposite conductivity being absorbed in the oxidized surface, said impurity atoms piled up at the surface of the semiconductor wafer forming a conductive channel between said two regions of the same conductivity type in said semiconductor wafer in the regions adjacent the previously formed second set of windows; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of the opposite type conductivity.

Claim 12

A method for forming both normally off and normally on insulated gate field effect transistors in a single semiconductor wafer comprising the steps of: opening a first set of windows in an insulating layer located on the surface of the semiconductor wafer; diffusing impurity atoms of one type conductivity through said first set of windows into a semiconductor wafer having the opposite type conductivity; opening a second set of windows in said insulating layer; diffusing impurity atoms of said one type conductivity through said first and second set of windows in the semiconductor wafer; diffusing impurity atoms of said opposite type conductivity into said semiconductor wafer thereby forming two regions of the same type conductivity separated by a region of the opposite type conductivity; oxidizing the surface of said semiconductor wafer causing impurity atoms of the type of conductivity forming the two regions of the same conductivity to pile up at the surface of the semiconductor wafer while the impurity atoms of the type of conductivity forming the intermediate region of the opposite conductivity being absorbed in the oxidized surface, said impurity atoms piled up at the surface of the semiconductor wafer forming a conductive channel between said two regions of the same conductivity type in said semiconductor wafer in the regions adjacent the previously formed second set of windows; and providing electrodes for each of said regions including a control electrode electrically insulated from the surface of the semiconductor wafer and positioned over the region of the opposite type conductivity.

Claim 13

A method for forming a semiconductor device arrangement especially adaptable for use as an insulated gate field effect transistor or as a conventional transistor comprising the steps of: forming a single substantially cup-shaped region of semiconductor material having one type conductivity between two regions of semiconductor material having the opposite type conductivity from said one tyPe conductivity by diffusing impurity atoms of opposite type conductivities through an opening in an insulating layer into the said semiconductor material until the said cup-shaped region''s width at the surface in contact with said insulating layer about 0.1 mil or less, said cup-shaped region of semiconductor material having a portion extending toward the surface of the semiconductor material; said one type conductivity cup-shaped region including an extension portion of the one type conductivity; and providing electrodes for each of said regions of semiconductor material including both a control electrode electrically insulated from the surface of semiconductor material and positioned over the portion of said cup-shaped region extending toward the surface of semiconductor material and a base electrode in electrical contact with said extension portion of said cup-shaped region.

Claim 14

A method for forming a semiconductor device arrangement especially adaptable for use as an insulated gate field effect transistor or as a conventional transistor comprising the steps of: forming a single substantially cup-shaped region of semiconductor material having one type conductivity between two regions of semiconductor material having the opposite type conductivity from said one tyPe conductivity by diffusing impurity atoms of opposite type conductivities through an opening in an insulating layer into the said semiconductor material until the said cup-shaped region''s width at the surface in contact with said insulating layer about 0.1 mil or less, said cup-shaped region of semiconductor material having a portion extending toward the surface of the semiconductor material; said one type conductivity cup-shaped region including an extension portion of the one type conductivity; and providing electrodes for each of said regions of semiconductor material including both a control electrode electrically insulated from the surface of semiconductor material and positioned over the portion of said cup-shaped region extending toward the surface of semiconductor material and a base electrode in electrical contact with said extension portion of said cup-shaped region.