Square root extractor for a process control system

Claim 2

A square root extractor circuit for a process control system including, in combination: a. a nonlinear amplifier having an exponential voltage gain characteristic and including feedback means comprising a plurality of transistors connected, respectively, in a plurality of parallel feedback paths for Said amplifier, and b. DC bias means connected to said nonlinear amplifier for applying thereto at least one predetermined offset voltage, said DC bias means also including means for biasing each of said plurality of said transistors at different DC bias potentials, respectively, whereby said plurality of transistors are operative to be successively biased into conduction at increasing levels of input signal voltage applied to said amplifying means, thereby providing a corresponding parabolic increase in feedback current for said amplifier and a corresponding exponential change in voltage gain characteristic thereof.

Claim 3

The square root extractor defined in claim 1, wherein: a. said DC bias means includes means for summing a first offset voltage, Voffset , with a process variable input voltage, Vin, and applying the sum of these two voltages to said nonlinear amplifier means, whereby the output voltage of said nonlinear amplifier means is equal to K Square Root Vin - Voffset where K is a gain constant of said nonlinear amplifier means, and b. said DC bias means further includes means for applying a second offset voltage, Voffset , to an output summing node at the output of said nonlinear amplifier whereby the output voltage K Square Root Vin - Voffset + Voffset may be derived at said output summing node.

Claim 4

The square root extractor defined in claim 2 wherein said gain constant K is equal to 2, and said first and second offset voltages, Voffset and Voffset , are both equal to 1 volt in magnitude.

Claim 5

Electronic circuitry for producing an output signal which varies in proportion to the square root of an input signal, said circuitry including, in combination: a. amplifying means having input and output terminals, b. a plurality of feedback transistors connected respectively in parallel paths between said input and output terminals of said amplifying means and operatively biased to conduct at different levels of input signal, and c. means for biasing each of said transistors at selected different DC potentials, so that said transistors are biased into conduction at different levels of input signal applied to said input terminal of said amplifying means, whereby as each of said transistors is successively biased into conduction, additional feedback paths are connected between said input and output terminals of said amplifying means to thereby cause the gain of said amplifying means to smoothly vary exponentially.

Claim 6

Electronic circuitry for producing an output signal which varies in proportion to the square root of an input signal, said circuitry including, in combination: a. amplifying means having input and output terminals, b. a plurality of feedback transistors connected respectively in parallel paths between said input and output terminals of said amplifying means and operatively biased to conduct at different levels of input signal, and c. means for biasing each of said transistors at selected different DC potentials, so that said transistors are biased into conduction at different levels of input signal applied to said input terminal of said amplifying means, whereby as each of said transistors is successively biased into conduction, additional feedback paths are connected between said input and output terminals of said amplifying means to thereby cause the gain of said amplifying means to smoothly vary exponentially.

Claim 7

Electronic circuitry defined in claim 4 which further includes: a. second amplifying means connected to the output of said first amplifying means for inverting the output signal of said first amplifying means, b. voltage limiting means connected to the output of said second amplifying means for limiting the voltage swing of the output signal of said second amplifying means to a predetermined amplitude, and c. current amplifying means connected to the output of said voltage limiting means for providing a predetermined level of output signal current at an output terminal of said electronic circuitry, said output signal current also serving to develop a required range of output voltages at the output of said current amplifying means for driving a voltage responsive controller.

Claim 8

Electronic circuitry defined in claim 5 which further includes: a. low pass filter means connected to receive a process variable input signal and removing noise therefrom, b. isolation amplifying means interconnecting the output of said low pass filter means to said input terminal of said first amplifying means for presenting a desired high impedance load to the source of said process variable input signal, and c. shunt impedance means connected in parallel with said low pass filter means for establishing a desirEd input impedance for said square root extractor and effectively by-passing the high input impedance of said isolation amplifying means.

Claim 9

A square root extractor circuit adapted for operation in a process control loop wherein a differential pressure transducer generates a process variable input signal which is proportional to the square of the flow rate of the process being controlled, said square root extractor including, in combination: a. amplifying means having input and output terminals and operative to receive said process variable input signal, b. nonlinear feedback means between said output and input terminals of said amplifying means including a plurality of transistors connected, respectively, in a plurality of parallel feedback paths for providing a feedback current which increases parabolically as a function of the input signal applied to said input terminal of said amplifying means, and c. means for biasing each of said plurality of said transistors with a plurality of separate DC bias potentials, whereby said plurality of transistors are operative to be successively biased into conduction with increased levels of input signal voltage applied to said amplifying means, d. means for applying a first offset voltage to an input summing node to which said input terminal is connected, whereby said first offset voltage is summed with said process variable input signal, said output signal at said output terminal of said amplifying means varying in accordance with sum of the square root of said process variable input signal and said first offset voltage, and e. means for applying a second offset voltage to an output summing node so at the output of said amplifying means so that said second offset voltage is summed with the output voltage of said amplifying means, whereby said offset voltage may be varied in accordance with the desired range of input and output voltages for a given process control application.

Claim 10

A square root extractor circuit adapted for operation in a process control loop wherein a differential pressure transducer generates a process variable input signal which is proportional to the square of the flow rate of the process being controlled, said square root extractor including, in combination: a. amplifying means having input and output terminals and operative to receive said process variable input signal, b. nonlinear feedback means between said output and input terminals of said amplifying means including a plurality of transistors connected, respectively, in a plurality of parallel feedback paths for providing a feedback current which increases parabolically as a function of the input signal applied to said input terminal of said amplifying means, and c. means for biasing each of said plurality of said transistors with a plurality of separate DC bias potentials, whereby said plurality of transistors are operative to be successively biased into conduction with increased levels of input signal voltage applied to said amplifying means, d. means for applying a first offset voltage to an input summing node to which said input terminal is connected, whereby said first offset voltage is summed with said process variable input signal, said output signal at said output terminal of said amplifying means varying in accordance with sum of the square root of said process variable input signal and said first offset voltage, and e. means for applying a second offset voltage to an output summing node so at the output of said amplifying means so that said second offset voltage is summed with the output voltage of said amplifying means, whereby said offset voltage may be varied in accordance with the desired range of input and output voltages for a given process control application.

Claim 11

The square root extractor defined in claim 7 wherein: a. said first and second offset voltages are equal in magnitude to 1 volt, b. said first offset voltage being summed with the process variable input voltage, Vin, to give the quantity Vin -1, c. said first amplifying means and said nonlinear feedback means forming a square root extracting nonlinear amplifier stage having an output voltage equal to K Square Root Vin -1 where K is a gain constant of said stage, and d. said second offset voltage being equal in magnitude to 1 volt and being summed with the output voltage of said nonlinear amplifier stage to thereby provide an output voltage equal to 2 Square Root Vin -1 +1 where K 2 for a linear output voltage range from 1 to 5 volts.

Claim 12

The square root extractor defined in claim 7 which further includes: a. second amplifying means connected to the output terminal of said first amplifying means for inverting the voltage at said output summing node, b. voltage limiting means connected to the output terminal of said second amplifying means and limiting the voltage amplitude level at the output of said second amplifying means, and c. current amplifying means interconnected between the output of said second amplifying means and a circuit output terminal for providing a desired level of output current or output voltage for said square root extractor.

Claim 13

The square root extractor defined in claim 9 which further includes: a. low pass filter means connected to a circuit input terminal for receiving a process variable input signal and removing noise from same, and b. isolation amplifier means interconnecting said low pass filter means and said input summing node for providing a desired amount of electrical isolation between said first amplifying means and said circuit input terminal.

Claim 14

The square root extractor defined in claim 10 which further includes: A. reference voltage regulating means interconnected between sais first and second power supply terminals and first and second reference voltage input terminals, respectively, of said nonlinear feedback means, said reference voltage regulating means providing substantially constant DC bias voltages for said plurality of said parallel connected transistors in said nonlinear feedback means, b. adjustable reference voltage means within said reference voltage regulating means and connected to the base electrodes of said plurality of said transistors in said nonlinear feedback means for varying the base bias potentials on said plurality of said parallel connected transistors, whereby the input signal voltage level applied to said first amplifying means which is required to successively bias said plurality of transistors into conduction may be varied, and c. adjustable impedance means connected to at least one of said plurality of said parallel connected transistors for controlling the exact exponential shape of the voltage gain characteristic of the combination of said first amplifying means and said nonlinear feedback means which together form a nonlinear amplifier stage.