Single stage differential amplifier

Claim 2

The combination comprising: an amplifying device including first, second, and third electrodes; input circuit means including first and second series connected impedance means; first voltage generating means connected for applying a first input signal to said input circuit means: third impedance means connecting said first electrode to a reference potential with said second impedance means; means connecting the junction of said first and second impedances to said second electrode for applying said first signal as a control input thereto; fourth impedance means connected to said third electrode; and, second voltage generating means connected for applying a second input signal through said fourth impedance means to said third electrode, said impedances being selected to have fixed values and said values of predetermined ones of said impedances being related in a predetermined manner for operating said amplifying means to produce an output signal at said third electrode which corresponds to the algebraic difference in amplitude between said first and second input signals and said first and second signals being of an amplitude and of the same polarity for biasing said amplifying means for linear operation.

Claim 3

A difference circuit for receiving input voltages V1 and V2 and for producing an output signal Eo proportional to the algebraic difference between said voltages, said circuit comprising: an amplifier having an input terminal and first and second output terminals; a first impedance means including series connected elements Z1 and Z2; a second impedance means including elements Z3 and Z4 connected to form series conductive path with said first and second output terminals; first and second means for applying said voltages V1 and V2, across said first and second means, respectIvely; means for coupling the junction between Z1 and Z2 to the input terminal of said amplifier; and means for deriving output signal Eo from said first output terminal; said elements Z1 and Z2 and said elements Z4 and Z3 being related by a constant factor P so as to satisfy the equation: Z2 .Z4/Z3.(Z1 Z2) 1 wherein Z1 P.Z2 and Z4 (P1)Z3 and the voltages V1 and V2 are of the same polarity and of an amplitude for biasing said amplifier for linear operation.

Claim 4

A difference circuit for receiving input voltages V1 and V2 and for producing an output signal Eo proportional to the algebraic difference between said voltages, said circuit comprising: an amplifier having an input terminal and first and second output terminals; a first impedance means including series connected elements Z1 and Z2; a second impedance means including elements Z3 and Z4 connected to form series conductive path with said first and second output terminals; first and second means for applying said voltages V1 and V2, across said first and second means, respectIvely; means for coupling the junction between Z1 and Z2 to the input terminal of said amplifier; and means for deriving output signal Eo from said first output terminal; said elements Z1 and Z2 and said elements Z4 and Z3 being related by a constant factor P so as to satisfy the equation: Z2 .Z4/Z3.(Z1 Z2) 1 wherein Z1 P.Z2 and Z4 (P1)Z3 and the voltages V1 and V2 are of the same polarity and of an amplitude for biasing said amplifier for linear operation.

Claim 5

The difference circuit of claim 2 further including a constant voltage device connecting said junction to said input terminal, said device for subtracting a constant voltage from said voltage V1 which is less in magnitude than said voltage V1 thereby extending the operating range of said amplifier for producing said output signal Eo in response to larger values of said voltage V1 and said input terminal, first and second output terminals respectively correspond to base, collector and emitter electrodes.

Claim 6

The amplifier of claim 2 wherein said impedances are totally resistive and conform to the following: Z1 R1, Z2 R2, Z3 R3, and Z4 R4 wherein R1 P.R2 and R4 (P+1) R3 and P is any independent constant.

Claim 7

In combination: a voltage divider for receiving a first input voltage V1, said voltage divider including first and second fixed impedances; an impedance means for receiving a second input voltage V2, said impedance means including first and second fixed impedances, said first impedance being directly connected in common with one end of said second impedance of said voltage divider; an amplifier having an input control terminal and first and second output terminals, said input control terminal being connected for receiving the divided voltage produced by said divider proportional to V1/(P+1), where P is any independent constant and (P+1) is the ratio between said first and second impedances; and said impedance means being connected for producing an output difference signal Eo, said first and second impedances of said impedance means being connected in series with said first and second terminals for driving a current ic from said amplifier such that said current ic is proportional to V1/Z1.(P+1), where Z1 is the value of said first impedance in said impedance means and said output signal Eo is proportionally defined as: Eo*V2+ic.Z2, where Z2 is the value of said second impedance of said impedance means, and * means approximately equals said value, said impedance Z2 being selected according to the relationship: Z2 Z1.(P+1) whereby the output signal Eo becomes *V2-V1 and said input voltages V1 and V2 are of an amplitude for biasing said amplifier for linear operation.

Claim 8

In combination: a voltage divider for receiving a first input voltage V1, said voltage divider including first and second fixed impedances; an impedance means for receiving a second input voltage V2, said impedance means including first and second fixed impedances, said first impedance being directly connected in common with one end of said second impedance of said voltage divider; an amplifier having an input control terminal and first and second output terminals, said input control terminal being connected for receiving the divided voltage produced by said divider proportional to V1/(P+1), where P is any independent constant and (P+1) is the ratio between said first and second impedances; and said impedance means being connected for producing an output difference signal Eo, said first and second impedances of said impedance means being connected in series with said first and second terminals for driving a current ic from said amplifier such that said current ic is proportional to V1/Z1.(P+1), where Z1 is the value of said first impedance in said impedance means and said output signal Eo is proportionally defined as: Eo*V2+ic.Z2, where Z2 is the value of said second impedance of said impedance means, and * means approximately equals said value, said impedance Z2 being selected according to the relationship: Z2 Z1.(P+1) whereby the output signal Eo becomes *V2-V1 and said input voltages V1 and V2 are of an amplitude for biasing said amplifier for linear operation.

Claim 9

A difference amplifier comprising: current amplifying means having an input control terminal, a common terminal, and at least one output terminal; first and second means, the junction of said first and second impedance means being connected to said control terminal; third impedance means connecting said common terminal to a reference potential in common with one end of said second impedance means; first means for applying a first input signal of a first polarity through said first impedance means to said control terminal; fourth impedance means connected to said output terminal; volTage source biasing means adapted to supply operating voltages to said amplifying means, said biasing means being directly connected to said first and said fourth impedance means for operating said amplifier means within its linear range; and, second means for applying a second input signal opposite in polarity to said first input signal through said fourth impedance means, all said impedances means being selected to have fixed values and said values of predetermined ones being related in a predetermined manner for operating said amplifying means to produce an output signal proportional to the algebraic difference in amplitude between said first and second input signals.

Claim 10

A difference amplifier comprising: current amplifying means having an input control terminal, a common terminal, and at least one output terminal; first and second means, the junction of said first and second impedance means being connected to said control terminal; third impedance means connecting said common terminal to a reference potential in common with one end of said second impedance means; first means for applying a first input signal of a first polarity through said first impedance means to said control terminal; fourth impedance means connected to said output terminal; volTage source biasing means adapted to supply operating voltages to said amplifying means, said biasing means being directly connected to said first and said fourth impedance means for operating said amplifier means within its linear range; and, second means for applying a second input signal opposite in polarity to said first input signal through said fourth impedance means, all said impedances means being selected to have fixed values and said values of predetermined ones being related in a predetermined manner for operating said amplifying means to produce an output signal proportional to the algebraic difference in amplitude between said first and second input signals.

Claim 11

The difference amplifier of claim 6 wherein said first impedance means is a first resistor connected between said first means and said junction, said second impedance means is a second resistor connected between said junction and said reference potential, said third impedance means is a third resistor connected between said common terminal and said reference potential, and said fourth impedance is a resistor connected between said second means and said output terminal.

Claim 12

The amplifier of claim 6 wherein said amplifying means includes a single transistor having base, emitter, and collector electrodes corresponding to said control, common, and output terminals respectively.

Claim 13

The amplifier of claim 6 wherein the voltage on said control terminal is proportional to said first input signal and the current through said fourth impedance is entirely a function of said current flowing through said third impedance.

Claim 14

The amplifier of claim 6 wherein said first input signal corresponds to a voltage V1 and said second input signal corresponds to a voltage V2, said voltages V1 and V2 for linear operation of said amplifier having values between the range whose limits are defined by the relationships: V1DV.(P+1) and V2 V1.(P+2)/(P+1)-DV.(P+2) where P is any independent constant and DV is the voltage drop between said input control terminal and said common terminal.

Claim 15

The amplifier of claim 5 wherein said first and second means comprise signal sources which generate said signals of opposite polarity and wherein said first means is directly coupled to said input control terminal through said first impedance means and said second means is directly coupled to said one output terminal through said fourth impedance means.

Claim 16

The amplifier of claim 6 wherein said first input signal is defined as a voltage V1, said second input signal is defined as a voltage V2, and said output signal is defined as a voltage, Eo, which is given by the relationship Eo V2-V1+DV.(P+1) where P is any independent constant and DV is the voltage drop between said input control terminal and said common terminal.

Claim 17

A difference amplifier comprising: current amplifying means having an input control terminal, a common terminal and at least one output terminal; first and second impedances, the junctions of said first and second impedances being connected to said control terminal; a third impedance connecting said common terminal to a reference potential in common with one end of said second impedance; first means for applying a first input signal of a first polarity through said first impedance to said control terminal; a fourth impedance connected to said output terminal; voltage source biasing means adapted to supply operating voltages to said amplifying means, said biasing means being directly connected to said first and said fourth impedances for operating said amplifier means within its linear range; second means for applying a second input signal opposite in polarity to said first input signal through said fourth impedance; and, said impedances being selected to have fixed values for operating said amplifying means to produce an output signal proportional to the algebraic difference in amplitude between said first and second input signals, said values of impedances conforming to the following: said first impedance Z1; said second impedance Z2; said third impedance Z3; said fourth impedance Z4; and wherein said impedance values are related as follows: Z2.Z4/Z3.(Z1+Z2) 1.

Claim 18

A difference amplifier comprising: current amplifying means having an input control terminal, a common terminal and at least one output terminal; first and second impedances, the junctions of said first and second impedances being connected to said control terminal; a third impedance connecting said common terminal to a reference potential in common with one end of said second impedance; first means for applying a first input signal of a first polarity through said first impedance to said control terminal; a fourth impedance connected to said output terminal; voltage source biasing means adapted to supply operating voltages to said amplifying means, said biasing means being directly connected to said first and said fourth impedances for operating said amplifier means within its linear range; second means for applying a second input signal opposite in polarity to said first input signal through said fourth impedance; and, said impedances being selected to have fixed values for operating said amplifying means to produce an output signal proportional to the algebraic difference in amplitude between said first and second input signals, said values of impedances conforming to the following: said first impedance Z1; said second impedance Z2; said third impedance Z3; said fourth impedance Z4; and wherein said impedance values are related as follows: Z2.Z4/Z3.(Z1+Z2) 1.

Claim 19

The amplifier of claim 13 wherein said impedances are related as follows: Z1 K1Z2, and Z4 K2Z3 where K1 and K2 are constants.

Claim 20

The amplifier of claim 14 wherein K2 (K1+1).

Claim 21

A difference amplifier comprising: current amplifying means having an input control terminal, a common terminal, and at least one output terminal; first and second impedance means, the junction of said first and second impedance means being connected to said control terminal; third impedance means connecting said common terminal to a reference potential in common with one end of said second impedance means; first means for applying a first input signal of a first polarity through said first impedance means to said control terminal; fourth impedance means connected to said output terminal; voltage source biasing means adapted to supply operating voltages to said amplifying means, said biasing means being directly connected to said first and fourth impedance means for operating said amplifier means within its linear range; second means for applying a second input signal opposite in polarity to said first input signal through said fourth impedance means, all of said impedance means being selected to have fixed values with said values of predetermined ones of said impedance means being related in a predetermined manner for operating said amplifying means to produce an output signal proportional to the algebraic difference in amplitude between said first and second input signals; and, a constant voltage device connecting said junction to said control terminal, said device for subtracting a constant voltage from said first input signal which is less in magnitude than said input signal thereby extending the operating range of said difference amplifier for producing said output signal in response to larger values of said first signal applied by said first means.

Claim 22

A difference amplifier comprising: current amplifying means having an input control terminal, a common terminal, and at least one output terminal; first and second impedance means, the junction of said first and second impedance means being connected to said control terminal; third impedance means connecting said common terminal to a reference potential in common with one end of said second impedance means; first means for applying a first input signal of a first polarity through said first impedance means to said control terminal; fourth impedance means connected to said output terminal; voltage source biasing means adapted to supply operating voltages to said amplifying means, said biasing means being directly connected to said first and fourth impedance means for operating said amplifier means within its linear range; second means for applying a second input signal opposite in polarity to said first input signal through said fourth impedance means, all of said impedance means being selected to have fixed values with said values of predetermined ones of said impedance means being related in a predetermined manner for operating said amplifying means to produce an output signal proportional to the algebraic difference in amplitude between said first and second input signals; and, a constant voltage device connecting said junction to said control terminal, said device for subtracting a constant voltage from said first input signal which is less in magnitude than said input signal thereby extending the operating range of said difference amplifier for producing said output signal in response to larger values of said first signal applied by said first means.

Claim 23

The amplifier of claim 16 wherein said constant voltage device is a semiconductor diode.