Multi-waveform generation from a single tapped delay line

Claim 2

A multi-waveform signal generator comprising: a single tapped delay line for providing a plurality of delay signals, means for supplying a plurality of independent input data streams, and a plurality of circuit means for receiving said plurality of independent input data streams, said plurality of circuit means being responsive to said plurality of delay signals for generating a plurality of independent signal waveforms in a plurality of output channels.

Claim 3

The apparatus in claim 1 further including a source of pulses at the transmission rate to be propagated through said delay line, each of said plurality of circuit means comprising a plurality of gate means coupled to said delay line for receiving said data signals in accordance with information to be transmitted, said gate means being sequentially enabled by the pulses propagating through said delay line in the presence of said data signals, a gain adjustment means coupled to each of said gate means to amplify positively or negatively those signals transferred thereby, and amplifier means coupled to said gain adjustment means to sum those signals generated by said gain adjustment means, the output of said amplifier means being a waveform of predetermined phase, frequency and amplitude in direct relation to the applied data signal.

Claim 4

The apparatus as set forth in claim 2 further including shift register means coupled to the output of said delay line at predetermined intervals thereof to receive said data signals and selectively enable predetermined ones of said gate means thereby rendering said delay line responsive for more than one transmission interval.

Claim 5

In a data communication system, a multi-waveform signal generator for selectively generating a plurality of waveforms in a plurality of channels or a composite waveform in a single channel in response to a plurality of independent sources of timing data information signals, the combination comprising, a source of signal pulses at a transmission rate, a single tapped delay line with a predetermined number of delay stages therein coupled to receive said signal pulses, said pulses being propagated down said delay line at a predetermined multiple of said transmission rate, and at least two signal waveform generation circuit means coupled to said delay line for generating independent output signal waveforms in response to at least two of said independent sources of data information signals.

Claim 6

In a data communication system, a multi-waveform signal generator for selectively generating a plurality of waveforms in a plurality of channels or a composite waveform in a single channel in response to a plurality of independent sources of timing data information signals, the combination comprising, a source of signal pulses at a transmission rate, a single tapped delay line with a predetermined number of delay stages therein coupled to receive said signal pulses, said pulses being propagated down said delay line at a predetermined multiple of said transmission rate, and at least two signal waveform generation circuit means coupled to said delay line for generating independent output signal waveforms in response to at least two of said independent sources of data information signals.

Claim 7

The combination of claim 4 wherein each of said signal waveform generation circuit means comprises: a plurality of gating means equivalent in number to the sub-multiple transmission rate coupled to said delay line, said gating means being sequentially enabled by the output of each stage of said delay line in the presence of one of said independent sources of data information signals of at least one transmission interval in duration, a plurality of gain control means coupled to said gating means for amplifying positively or negatively those signals sequentially transferred by said gating means, and summing means coupled to said plurality of gain control means to sum those signals generating by said gain control means to generate an output signal of predetermined phase, frequency and amplitude in direct relation to the input data signals.

Claim 8

The combination as set forth in claim 5 further inCluding in each signal waveform generation circuit means a shift register means the stages of which are positioned at predetermined intervals of stages of said delay line in order to divide said delay line into sections the delay time of each of said sections being equivalent to one transmission interval.

Claim 9

The combination as set forth in claim 6 further including means for adding the outputs of the respective signal waveform generation means to form a composite multi-waveform signal.

Claim 10

The combination as set forth in claim 6 wherein said data information signals are binary in character.

Claim 11

The combination as set forth in claim 8 wherein at least one of said signal waveform generation means further includes means for receiving said binary information signals and collectively examining said signals in predetermined groups thereof, means coupled to said receiving and examining means to generate a multi-level signal in relation to the possible combinations of binary digits in said predetermined groups, and wherein each of said gating means includes AND gate circuits responsive to said possible combinations of binary digits, whereby each of said gain control means generates a signal whose relative output amplitude is dependent upon the gain setting thereof but whose amplitude is also stepwise dependent upon the combination of enabled AND gate circuits which interpret the possible combinations of binary digits applied thereto.

Claim 12

The combination as set forth in claim 8 including first and second signal waveform generation circuit means, wherein said binary information signals are applied to the first signal waveform generation circuit means, and wherein the complement of said binary information signals are applied to the second signal waveform generation circuit means, and including means for adding the outputs of said first and second signal waveform generation means to form a composite constant average power polar binary signal.

Claim 13

The combination as set forth in claim 8 including first and second signal waveform generation circuit means, means for receiving said binary information signals and collectively examining said signals in predetermined groups thereof, means coupled to said receiving and examining means for generating a multi-level signal in relation to the possible combinations of binary digits in said predetermined groups, first AND gates coupled to said generating means for detecting those groups of binary digits with the most significant digit of ''''1'''' and enabling said first signal waveform generation circuit means accordingly, and second AND gates coupled to said generating means for detecting those groups of binary digits with the most significant digit of ''''0'''' and enabling said second signal waveform generation circuit means accordingly, and means for adding the outputs of said first and second signal waveform generation means to form a composite multi-level polar binary signal.

Claim 14

The combination as set forth in claim 8 including a plurality of signal waveform generation circuit means for generating signals at similar frequencies but different phases, means for receiving said binary information signals and collectively examining said signals in predetermined groups thereof, means coupled to said receiving and examining means for generating a multi-level signal in relation to the possible combinations of binary digits in said predetermined groups, an AND gate means coupled to each of said generating means for detecting one of said possible combinations of binary digits and enabling said plurality of signal waveform generation circuits, and means for adding the outputs of said plurality of signal waveform generation circuits to form a multi-phase phase shift keyed signal.

Claim 15

The combination as set forth in claim 11 further including a serial to parallel converter coupled to said source of data signals for dividing said input binary data into two parallel binary data streams, wherein said first mentioned receiving and examining means are coupled to the output thereof to receive one of said parallel binary data streams, a third and fourth signal waveform generation circuit means, second means coupled to said serial to parallel converter for receiving the other parallel binary data stream therefrom and collectively examining said signals in predetermined groups thereof, second means coupled to said receiving and examining means for generating a second multi-level signal in relation to the possible combinations of binary digits in said predetermined groups, third AND gates coupled to said second generating means for detecting those groups of binary digits with the most significant digit of ''''1'''' and enabling said third signal waveform generation circuit means accordingly, fourth AND gates coupled to said second generating means for detecting those groups of binary digits with the most significant digit of ''''0'''' and enabling said fourth signal waveform generation circuit means accordingly, second means for adding the outputs of said third and fourth signal waveform generation means to form a second composite multi-level polar binary signal, and third means for adding the outputs of said first mentioned and second adding means to form a multi-level, multi-channel transmission system whose signals are orthogonal or potentially orthogonal.

Claim 16

The apparatus in claim 1 further including: a source of pulses at a transmission rate to be propagated through said delay line, said independent input data streams being synchronous with said source of pulses.

Claim 17

A multi-waveform signal generator comprising: a single tapped delay line, a plurality of independent input data streams, a plurality of sets of control gates coupled in parallel to the output taps of said delay line for receiving said independent input data streams, the control gates in each set of control gates being sequentially enabled by the outputs from said delay line in the presence of the signals in said data streams, and selective gain control means coupled to each of the control gates in each of the plurality of sets of control gates to provide selective gain adjustment for said data streams to thereby generate a plurality of independent signal waveforms.

Claim 18

A multi-waveform signal generator comprising: a single tapped delay line, a plurality of independent input data streams, a plurality of sets of control gates coupled in parallel to the output taps of said delay line for receiving said independent input data streams, the control gates in each set of control gates being sequentially enabled by the outputs from said delay line in the presence of the signals in said data streams, and selective gain control means coupled to each of the control gates in each of the plurality of sets of control gates to provide selective gain adjustment for said data streams to thereby generate a plurality of independent signal waveforms.

Claim 19

The apparatus as set forth in claim 15 further including: a source of pulses at the transmission rate to be propagated through said delay line, said independent input data streams being synchronous with said source of pulses.

Claim 20

The apparatus as set forth in claim 16 further including: an amplifier means coupled to each set of said gain control means to sum those signals generated by said gain control means, the outputs of said amplifier means being waveforms of predetermined phase, frequency and amplitude in direct relation to the applied independent input data streams.