Gate circuit for electronic musical instruments

Claim 2

A gate circuit comprising: a pair of active elements each having a first, a second and a third terminal, the first terminals of the elements being connected in common, a signal being applied to the second terminal of one of said pair of active elements, and means for supplying desired bias voltages to the second and third terminals of the pair of active elements; means connected to the third terminal of the other of said pair of active elements for deriving the signal from the other of said pair of active elements; a third active element having a first, a second and a third terminal, the current path between the first terminal and the third terminal through the third active element being connected between the first terminals of the pair of active elements and a common reference potential; means for applying a direct current gating signal to said second terminal of said third active element, said means including a mechanical switch and a direct current voltage source connected to the second terminal of said third active element; and envelope forming circuit means connected to the second terminal of said third active element for receiving said gating signal.

Claim 3

A gate circuit according to claim 1, in which said switch is coupled to a biasing voltage supplying means providing one of said desired bias voltages and serving as said direct current voltage source and said gating signal is supplied from said biasing voltage supplying means through said switch.

Claim 4

A gate circuit according to claim 1, in which said envelope forming circuit means comprises a diode and a capacitor both connected to the second terminal of said third active element, said gate circuit further comprising a fourth active element connected to said diode in series.

Claim 5

A gate circuit according to claim 3, in which said first, second, third and fourth active elements are bipolar transistors.

Claim 6

A gate circuit comprising: a first voltage source; a plurality of differential amplifier means, each comprising a pair of transistors the emitter electrodes of which are connected in common and a third transistor having a collector connected to said emitter electrodes, said plurality of differential amplifier means being connected to said first voltage source in parallel; switching means commonly connected to the base electrodes of the third transistors of said respective amplifier means; a second voltage source for supplying a biasing voltage to the respective base electrodes of said third transistors through said switching means; and a time delay circuit means commonly connected to the base electrodes of said third transistors and through said switching means to said second voltage source, said time delay circuit means comprising a capacitor commonly connected to the base electrodes of said third transistors, a first diode commonly connected to the base electrodes of said third transistors so as to be forwardly biased by said second voltage source, a resistance connected to said first diode in series, and a fourth transistor connected to said resistance in series.

Claim 7

A gate circuit comprising: a first voltage source; a plurality of differential amplifier means, each comprising a pair of transistors the emitter electrodes of which are connected in common and a third transistor having a collector connected to said emitter electrodes, said plurality of differential amplifier means being connected to said first voltage source in parallel; switching means commonly connected to the base electrodes of the third transistors of said respective amplifier means; a second voltage source for supplying a biasing voltage to the respective base electrodes of said third transistors through said switching means; and a time delay circuit means commonly connected to the base electrodes of said third transistors and through said switching means to said second voltage source, said time delay circuit means comprising a capacitor commonly connected to the base electrodes of said third transistors, a first diode commonly connected to the base electrodes of said third transistors so as to be forwardly biased by said second voltage source, a resistance connected to said first diode in series, and a fourth transistor connected to said resistance in series.

Claim 8

A gate circuit according to claim 5, in which the base electrodes of said pair of transistors of said respective amplifier means are biased by said second voltage source, said gate circuit further comprising a second diode connected between the base electrodes of each of said pair of transistors and the base electrodes of said third transistors so as to be forwardly biased by said second voltage source.