Patent US3646586A successfully refreshed from Google Patents.
US3646586A
Expired / Lapsed
US
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Analogue-to-digital converter system
Assignee: TENNELEC Inc
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Filing: 1969-04-28
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Granted: 1972-02-29
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Expires: 1989-04-28
Abstract
Abstract A serial-parallel analogue-to-digital converter system utilizes a conventional ADC having a relatively low number of channels together with at least one amplifier which may be set at different amplification factors, a conventional digital-toanalogue converter, and an arithmetic device that generates the digital output, to provide a fast conversion and an output having a substantially greater number of channels and a correspondingly high resolution. The conventional ADC is utilized several successive times at increasingly higher sensitivity through the use of the amplifier which may have its gain increased and its zero offset changed with each succeeding use of the ADC. Various means are described which may be employed for reducing or eliminating any errors which could be generated in the operation of this system. Additionally, particular circuit configurations are described which may be advantageously employed in the system for effecting the necessary gain changes with a minimum of error in result and a minimum of circuit complexity.
Inventors
- 👤 Rainer Kurz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 09:40
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/1205
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
304 words
A system for converting data in analogue form to digital form and having a predetermined number of quantitizing channels comprising an analogue-to-digital converter having a number of quantitizing channels less than said predetermined number, amplifying means having an input responsive to the analogue signal to be digitized and providing an output signal characterized as being the product of the input signal and the amplification factor of said amplifying means, means coupling the output of said amplifying means to the analogue input of said converter, means for controllably sequentially varying the amplification factor of said amplifying means from a first value to a predetermined number of successively higher values, each corresponding to a separate step of analysis of the analogue input signal, means responsive to the digital output of said converter during each successive step for providing signals indicative of the respective products of each digital output of said converter and multiplying factor, each successive multiplying factor being respectively characterized by the ratio of the highest and each successively lower amplification factor to the lowest amplification factor thereby expanding the digital output of said converter from said lesser number to said predetermined number of channels, a digital-to-analogue converter also responsive to said digital output for providing during each successive step an analogue feedback signal indicative of the lower level of the particular digital channel of said analogueto-digital converter output, means for combining said feedback signal with said analogue input signal so as to supply to the analogue input of said analogue-to-digital converter a combined signal characterized by the difference between them so that there are provided expanded signal outputs corresponding to the resulting products of each step, and means for summing each of said products to provide a digital output associated with one of said predetermined number of channels corresponding to said analogue input signal.
Claim 2
Independent Claim
304 words
A system for converting data in analogue form to digital form and having a predetermined number of quantitizing channels comprising an analogue-to-digital converter having a number of quantitizing channels less than said predetermined number, amplifying means having an input responsive to the analogue signal to be digitized and providing an output signal characterized as being the product of the input signal and the amplification factor of said amplifying means, means coupling the output of said amplifying means to the analogue input of said converter, means for controllably sequentially varying the amplification factor of said amplifying means from a first value to a predetermined number of successively higher values, each corresponding to a separate step of analysis of the analogue input signal, means responsive to the digital output of said converter during each successive step for providing signals indicative of the respective products of each digital output of said converter and multiplying factor, each successive multiplying factor being respectively characterized by the ratio of the highest and each successively lower amplification factor to the lowest amplification factor thereby expanding the digital output of said converter from said lesser number to said predetermined number of channels, a digital-to-analogue converter also responsive to said digital output for providing during each successive step an analogue feedback signal indicative of the lower level of the particular digital channel of said analogueto-digital converter output, means for combining said feedback signal with said analogue input signal so as to supply to the analogue input of said analogue-to-digital converter a combined signal characterized by the difference between them so that there are provided expanded signal outputs corresponding to the resulting products of each step, and means for summing each of said products to provide a digital output associated with one of said predetermined number of channels corresponding to said analogue input signal.
Claim 3
Dependent Claim
68 words
The system of claim 1 comprising timing means for generating electrical pulses at predetermined intervals and means for coupling said pulses to said means for sequentially varying the amplification factor of said amplifying means so that the amplification factor is maintained at said first value during the first of said intervals and is changed to each of said successively higher values during each successive one of said intervals.
Claim 4
Dependent Claim
33 words
The system of claim 2 wherein all of said predetermined intervals are of equal duration, said duration being sufficiently long to allow the system to reach equilibrium during each step of the analysis.
Claim 5
Dependent Claim
47 words
The system of claim 1 comprising an adjustable bias means for applying a DC bias signal to said amplifying means whereby any input offset of the system may be canceled by the introduction of said bias in an equal magnitude to said offset but with opposite polarity.
Claim 6
Dependent Claim
30 words
The system of claim 1 comprising means for producing amplifier gain variations between successive steps of the analysis which are equal to the number of channels of said analogue-to-digital converter.
Claim 7
Dependent Claim
39 words
The system of claim 1 comprising means for producing amplifier gain variations between successive steps of the analysis which are less than the number of channels in said analogue-to-digital converter, whereby an error-correcting redundancy is introduced into the system.
Claim 8
Dependent Claim
102 words
The system of claim 6 comprising timing means for generating electrical pulses at predetermined intervals and means for coUpling said pulses to said means for sequentially varying the amplification factor of said amplifying means so that the amplification factor is maintained at said first value during the first of said intervals and is changed to each of said successively higher values during each successive one of said intervals, all of said intervals prior to the last interval being of shorter duration than said last interval so that only said last interval is sufficiently long to allow the system to reach equilibrium therein.
Claim 9
Dependent Claim
70 words
The system of claim 1 comprising means for providing prebias signals having particular values corresponding to each but the last successive step of analysis, and means for combining said prebias signals with the analogue input signal to the analogue-to-digital converter so that the particular values of prebias applied in each but the last step substantially eliminate the possibility of obtaining a negative residue during said successive steps of the analysis.
Claim 10
Dependent Claim
118 words
The system of claim 1 comprising means for providing preselected values of prebias signals during predetermined steps of the analysis operation, means for selectively coupling said preselected prebias signals to the analogue input of said analogue-to-digital converter so that the prebias signal magnitude at each but the last step in the operation is the sum of the quantity one-half the difference between the total number of channels in the analogue-to-digital converter and the ratio of gains between the gain in said each step and the preceding step and the quantity given by the sum of the preselected biases, weighted according to their corresponding gain changes, if any, which will be added during all succeeding steps of the operation.
Claim 11
Dependent Claim
112 words
The system of claim 1 comprising means for inserting a preselected bias to the input of said amplifying means during each but the last step of the operation, said means including means for providing said bias values according to the following relationship: where Bi is the preselected bias applied during the ith step of the operation; m is the total number of steps in the conversion operation; A1 is the gain of said amplifying means during the first step; Ai is the gain of said amplifying means during the ith step; k+1 is the number of channels in said analogue-to-digital converter; and L1 is the first reference level in said analogue-to-digital converter.
Claim 12
Dependent Claim
101 words
The system of claim 1 wherein said amplifying means includes a high-gain amplifier and an input resistor coupled thereto, and said means for varying the amplification factor of said amplifying means comprises the series combination of resistance means and controllable switching means, said series combination being connected in parallel across said amplifier so that the gain of said amplifying means is greater when said switching means is in its nonconductive condition than when it is in its conductive condition, whereby the greatest error which may be introduced by said switching means resistance occurs during the low-gain condition of said amplifying means.
Claim 13
Dependent Claim
69 words
The system of claim 11 wherein said switching means comprises a semiconductor switching device having three terminals including a control terminal, the remaining two terminals being in the series combination and being arranged with respect to the control signal polarity applied to the control terminal for switching to cause the control terminal current to flow into the output of the amplifier, whereby any offset at said output is minimized.
Claim 14
Dependent Claim
87 words
The system of claim 11 wherein said switching means comprises a diode bridge circuit having two control terminals, two controlled terminals, and at least one rectifier diode in each arm of the bridge, all of said diodes being connected with the same polarity with respect to said control terminals, said bridge having its controlled terminals connected in said sEries combination so that the bridge presents an open circuit thereto when no current flows through said control terminals, but a closed circuit when current flows through the bridge.
Claim 15
Dependent Claim
72 words
The system of claim 13 comprising means for resistively coupling a bias signal to the output of said amplifier and to one of said controlled terminals of said bridge, said one controlled terminal being also resistively coupled to the output of said amplifier, whereby both the gain of said amplifier and its output offset are simultaneously changed by predetermined amounts by the passing of current through said control terminals of said bridge.
Claim 16
Dependent Claim
78 words
The system of claim 13 wherein a plurality of said amplifying means and said means for varying the amplification factor of said amplifying means are coupled together in a cascade arrangement, said system further comprising a corresponding plurality of switching means for controlling current flow through each of the diode bridges so that all of the bridges present an open circuit to provide the highest amplification factor of said amplifying means in the last step of the operation.
Claim 17
Dependent Claim
100 words
The system of claim 15 comprising means for resistively coupling a bias signal to the output of each amplifier and to one of said controlled terminals of each of said bridges, said one controlled terminal of each bridge being also resistively coupled to the output of its respective amplifier so that the conductive condition of each bridge controls the application of each bias, each bias signal having such a value in each successive step that when it is combined with the analogue input signal the possibility of producing a negative residue is substantially eliminated in each step of the operation.
Claim 18
Dependent Claim
44 words
The system of claim 1 wherein said analogue-to-digital converter comprises a plurality of comparators defining each of the channels thereof, means for converting the output of said comparator to a Gray code, and means for converting said Gray code to a straight binary code.
Claim 19
Independent Claim
167 words
A system for converting data in analogue form to digital form having a predetermined number of quantitizing channels at its output, said system comprising an analogue-to-digital converter having k reference levels and k+1 channels, where L1 is the lowest level and Lk is the highest level, and where k+1 is substantially less than said predetermined number of quantitizing channels, amplifying means having an input responsive to an analogue input signal, v1, means coupled to said amplifying means for varying the amplification factor thereof to successively higher values A1, A2 ... Am, in respective successive separate steps of analysis and conversion of the signal v1 to a digital output associated with N of said quantitizing channels, arithmetic means responsive to each successive output of the analogue-to-digital converter to provide a weighted digital cumulative count from each step, and circuit means intercoupling the output of said converter to its input so that the number N of said quantitizing channels for said conversion of v1 is given by the relationship
Claim 20
Independent Claim
167 words
A system for converting data in analogue form to digital form having a predetermined number of quantitizing channels at its output, said system comprising an analogue-to-digital converter having k reference levels and k+1 channels, where L1 is the lowest level and Lk is the highest level, and where k+1 is substantially less than said predetermined number of quantitizing channels, amplifying means having an input responsive to an analogue input signal, v1, means coupled to said amplifying means for varying the amplification factor thereof to successively higher values A1, A2 ... Am, in respective successive separate steps of analysis and conversion of the signal v1 to a digital output associated with N of said quantitizing channels, arithmetic means responsive to each successive output of the analogue-to-digital converter to provide a weighted digital cumulative count from each step, and circuit means intercoupling the output of said converter to its input so that the number N of said quantitizing channels for said conversion of v1 is given by the relationship
Claim 21
Dependent Claim
68 words
The system of claim 18 wherein said circuit means includes a digital-to-analogue converter, and wherein a residue is produced at the end of the ith step which exceeded the (k-1)th reference level but not the kth level, said residue being given by is the sum of all of the digital-to-analogue converter levEls combined with the input to the analogue-to-digital converter during the (i-1) preceding steps of the analysis.
Claim 22
Dependent Claim
20 words
The system of claim 19 comprising means for maintaining Ai+1/Ai less than k+1 in each successive step of the operation.
Claim 23
Independent Claim
119 words
A method for converting data in analogue form to digital form by providing a predetermined number of channels in which to quantitize the analogue input data, said method comprising the steps of successively supplying the analogue input, multiplied by successively higher factors, to an analogue-to-digital converter having a number of channels substantially lower than said predetermined number, successively subtracting an amount from the input to said converter corresponding to the channel output thereof to provide successive residues therefrom, multiplying each successive residue by a weighting factor associated with each successive multiplier factor to expand the output of the converter to said predetermined number of channels, and summing all of the separate products of each respective weighting factor and residue.
Claim 24
Independent Claim
119 words
A method for converting data in analogue form to digital form by providing a predetermined number of channels in which to quantitize the analogue input data, said method comprising the steps of successively supplying the analogue input, multiplied by successively higher factors, to an analogue-to-digital converter having a number of channels substantially lower than said predetermined number, successively subtracting an amount from the input to said converter corresponding to the channel output thereof to provide successive residues therefrom, multiplying each successive residue by a weighting factor associated with each successive multiplier factor to expand the output of the converter to said predetermined number of channels, and summing all of the separate products of each respective weighting factor and residue.
Claim 25
Dependent Claim
26 words
The method of claim 21 wherein said successively higher factors are successively increased by an amount less than the number of channels in the analogue-to-digital converter.
Claim 26
Dependent Claim
80 words
The method of claim 21 comprising the further steps of subtracting from the input to said converter, at each but the last step of analysis, the sum of the quantity of one-half the difference between the number of channels of said converter and the ratio of successive multiplier factors in said each step to the preceding step and the quantity given by the sum of the further amounts which will be added thereto during all succeeding steps of the analysis.
Claim 27
Dependent Claim
131 words
Apparatus for converting an analogue signal to digital form by providing a predetermined number of output channels to quantitize the analogue input signal, said apparatus comprising means for successively supplying the analogue input signal, multiplied by successively higher factors, to an analogue-to-digital converter having a number of channels substantially lower than said predetermined number, means for successively substracting an amount from the input signal to said converter corresponding to the channel output thereof to provide successive residues therefrom, means for multiplying each successive residue by a weighting factor associated with each successive multiplier factor to expand the output of the converter to said predetermined number of channels, and means for summing all of the separate products of each respective weighting factor and residue to provide an output in said digital form.
Claim 28
Dependent Claim
131 words
Apparatus for converting an analogue signal to digital form by providing a predetermined number of output channels to quantitize the analogue input signal, said apparatus comprising means for successively supplying the analogue input signal, multiplied by successively higher factors, to an analogue-to-digital converter having a number of channels substantially lower than said predetermined number, means for successively substracting an amount from the input signal to said converter corresponding to the channel output thereof to provide successive residues therefrom, means for multiplying each successive residue by a weighting factor associated with each successive multiplier factor to expand the output of the converter to said predetermined number of channels, and means for summing all of the separate products of each respective weighting factor and residue to provide an output in said digital form.
Claim 29
Dependent Claim
27 words
The apparatus of claim 24 comprising means for increasing the successively higher multiplier factors by an amount less than the number of channels in the analogue-to-digital converter.
Claim 30
Dependent Claim
82 words
The apparatus of claim 24 comprising means for subtracting from the input to said converter, at each but the last step of analysis, a prebias corresponding to the sum of the quantity of one-half the difference between the number of channels of said converter and the ratio of successive multiplier factors in said each step to the preceding step and the quantity given by the sum of the further amounts which will be added thereto during all succeeding steps of the analysis.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-28 | 1975-08-30 | 1976-02-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-28 | 1979-08-30 | 1980-02-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-28 | 1983-08-30 | 1984-02-29 | $7700.00 | Window Closed / Lapsed |