US3643232A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Large-scale integration of electronic systems in microminiature form
Assignee: Texas Instruments Inc
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Filing: 1967-06-05
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Granted: 1972-02-15
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Expires: 1987-06-05
Abstract
Abstract Large-scale integration of complex electronic circuitry and systems in semiconductor microminiature form comprising functional elements or cells at least partially in one surface of a semiconductor substrate and arranged in rows and columns with spaces between the rows, each cell including a plurality of first conductivity-type semiconductor regions in the substrate of opposite conductivity type in spaced-apart relation to form plural conduction paths and at least one semiconductor region of said first conductivity type extending under one of the spaces and being common to a conduction path in each of a pair of adjacent cells in a column. Also, disclosed is a multilayer connector pattern supported by the substrate and interconnecting the cells into an electronic system wherein the upper connector layer includes a supply line arranged to wind along the spaces in a serpentine fashion.
Inventors
- 👤 Jack S Kilby
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 01:14
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/90; H10D84/901; H10W; H10W20/00; H10W20/40
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
204 words
A complex electronic system having a plurality of circuit functions therein, each circuit function having active and passive electronic components, comprising a semiconductor substrate, a large number of said electronic components at least partially in one face of said substrate, a first insulating layer on said one face having openings therein exposing contact areas on said electronic components, a first conductive patter on said first insulating layer in ohmic contact with said contact areas through said openings interconnecting groups of said electronic components, said groups respectively forming said plurality of circuit functions, said circuit functions being arranged in a matrix of rows and columns on said one face of said substrate with spaces between said rows, a second insulating layer over said first conductive pattern having openings therein exposing contact portions on said first conductive pattern, and a second conductive pattern on said second insulating layer in ohmic connection with the exposed contact portions on said first conductive pattern to interconnect selected circuit functions and form said electronic system, said second conductive pattern including at least one conductor that winds along the spaces between said rows and interconnects a terminal in a circuit function located in each row and in a plurality of columns.
Claim 2
Dependent Claim
204 words
A complex electronic system having a plurality of circuit functions therein, each circuit function having active and passive electronic components, comprising a semiconductor substrate, a large number of said electronic components at least partially in one face of said substrate, a first insulating layer on said one face having openings therein exposing contact areas on said electronic components, a first conductive patter on said first insulating layer in ohmic contact with said contact areas through said openings interconnecting groups of said electronic components, said groups respectively forming said plurality of circuit functions, said circuit functions being arranged in a matrix of rows and columns on said one face of said substrate with spaces between said rows, a second insulating layer over said first conductive pattern having openings therein exposing contact portions on said first conductive pattern, and a second conductive pattern on said second insulating layer in ohmic connection with the exposed contact portions on said first conductive pattern to interconnect selected circuit functions and form said electronic system, said second conductive pattern including at least one conductor that winds along the spaces between said rows and interconnects a terminal in a circuit function located in each row and in a plurality of columns.
Claim 3
Dependent Claim
19 words
A complex electronic system according to claim 1, wherein said first and second insulating layers comprise a semiconductor oxide.
Claim 4
Dependent Claim
22 words
A complex electronic system acCording to claim 1, wherein each circuit function comprises transistors and resistors interconnected to form a logic function.
Claim 5
Dependent Claim
100 words
An LSI array of standard cells arranged in coordinate rows and columns with runways positioned between each row; said standard cells each including a plurality of first conductivity-type semiconductor regions diffused in one surface of a second conductivity-type semiconductor substrate in spaced-apart relation to form plural conduction paths; and insulating layer overlying said one surface and having access apertures therethrough positioned above said regions; wherein the improvement comprises: at least one region of first semiconductor material extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column.
Claim 6
Dependent Claim
100 words
An LSI array of standard cells arranged in coordinate rows and columns with runways positioned between each row; said standard cells each including a plurality of first conductivity-type semiconductor regions diffused in one surface of a second conductivity-type semiconductor substrate in spaced-apart relation to form plural conduction paths; and insulating layer overlying said one surface and having access apertures therethrough positioned above said regions; wherein the improvement comprises: at least one region of first semiconductor material extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column.
Claim 7
Dependent Claim
68 words
An LSI array of cells supported by a substrate and arranged in rows and columns with runways positioned between the rows, a multilayer connector pattern supported by the substrate and including a first connector layer overlying a second connector layer with an insulating layer therebetween; wherein the improvement comprises: a supply line included in said first layer and arranged to wind along the runways in a serpentine fashion.
Claim 8
Dependent Claim
68 words
An LSI array of cells supported by a substrate and arranged in rows and columns with runways positioned between the rows, a multilayer connector pattern supported by the substrate and including a first connector layer overlying a second connector layer with an insulating layer therebetween; wherein the improvement comprises: a supply line included in said first layer and arranged to wind along the runways in a serpentine fashion.
Claim 9
Dependent Claim
23 words
The invention according to claim 5 wherein said supply line extends along the runways located between the rows of adjacent pairs of rows.
Claim 10
Dependent Claim
29 words
The invention according to claim 6 wherein said supply line is one of plural lines included in a bus structure which winds along the runways in a serpentine fashion.
Claim 11
Dependent Claim
52 words
The LSI array of claim 5 wherein each cell includes a plurality of first conductivity-type semiconductor regions in said substrate which has a second conductivity type in spaced-apart relation to form plural conduction paths and portions of said second conductor layer ohmically connect to opposite ends of each of said conduction paths.
Claim 12
Dependent Claim
33 words
The LSI array of claim 5 wherein said second connector layer intraconnects each cell to provide substantially identical circuit functions and said first connector layer interconnects said cells to provide an electronic system.
Claim 13
Dependent Claim
40 words
A complex electronic system according to claim 1 wherein each circuit function includes a plurality of first conductivity-type semiconductor regions in one surface of said semiconductor substrate of a second conductivity type in spaced-apart relation to form plural conduction paths.
Claim 14
Dependent Claim
59 words
A complex electronic system according to claim 10 wherein one of said conduction paths in each circuit function comprises a heavily doped tunnel, and said first conductive pattern includes first and second conductors respectively connected to the ends of said tunnel and a third conductor crossing over said tunnel and connecting to electronic components within the respective circuit function.
Claim 15
Dependent Claim
78 words
An LSI array of cells at least partially in one face of a semiconductor substrate and arranged in rows and columns with runways positioned between the rows; a multilayer connector pattern supported by said substrate, connecting said cells into an electronic system and including a first connector layer overlying a second connector layer with an insulating layer therebetween; and a supply line included in said first layer and arranged to wind along the runways in a serpentine fashion.
Claim 16
Dependent Claim
78 words
An LSI array of cells at least partially in one face of a semiconductor substrate and arranged in rows and columns with runways positioned between the rows; a multilayer connector pattern supported by said substrate, connecting said cells into an electronic system and including a first connector layer overlying a second connector layer with an insulating layer therebetween; and a supply line included in said first layer and arranged to wind along the runways in a serpentine fashion.
Claim 17
Dependent Claim
24 words
The LSI array according to claim 12 wherein said supply line extends along the runways located between the rows of adjacent pairs of rows.
Claim 18
Dependent Claim
29 words
The LSI array according to claim 13 wherein said supply line is one of plural lines included in a structure which winds along the runways is a serpentine fashion.
Claim 19
Dependent Claim
43 words
The LSI array of claim 12 wherein each cell includes a plurality of first conductivity-type semiconductor regions in said one surface of said semiconductor substrate which has a second conductivity type, said regions being in spaced apart relation to form plural conduction paths.
Claim 20
Dependent Claim
39 words
The LSI array of claim 12 wherein each of said cells are intraconnected by saId second connector layer to provide substantially identical circuit functions and said cells are interconnected by said first connector layer to provide said electronic system.
Claim 21
Dependent Claim
98 words
An electronic system comprising an LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrate in spaced-apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column.
Claim 22
Dependent Claim
98 words
An electronic system comprising an LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrate in spaced-apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column.
Claim 23
Dependent Claim
114 words
An electronic system comprising an LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrate in spaced apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column, and a conductive pattern on said insulating material interconnecting said cells into said electronic system.
Claim 24
Dependent Claim
114 words
An electronic system comprising an LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrate in spaced apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column, and a conductive pattern on said insulating material interconnecting said cells into said electronic system.
Claim 25
Dependent Claim
41 words
An electronic system according to claim 18 wherein said conductive pattern includes first and second conductors connecting the ends of said at least one semiconductor region to said conduction path in each of said pair of adjacent cells in a column.
Claim 26
Dependent Claim
28 words
An electronic system according to claim 18 wherein each of said cells are intraconnected to provide substantially identical circuit functions and are interconnected to provide said electronic system.
Claim 27
Dependent Claim
148 words
An electronic system comprising an LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrate in spaced-apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column, and a conductive pattern on said insulating material interconnecting said cells into said electronic system, said conductive pattern including first and second conductors extending through at least some of said access apertures and ohmically connecting to opposite ends of at least some of said plural conduction paths in a cell.
Claim 28
Dependent Claim
148 words
An electronic system comprising an LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrate in spaced-apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column, and a conductive pattern on said insulating material interconnecting said cells into said electronic system, said conductive pattern including first and second conductors extending through at least some of said access apertures and ohmically connecting to opposite ends of at least some of said plural conduction paths in a cell.
Claim 29
Dependent Claim
41 words
An electronic system according to claim 21 wherein said conductive pattern includes third and fourth conductors connecting the ends of said at least one semiconductor region to a conduction path in each of said pair of adjacent cells in a column.
Claim 30
Dependent Claim
28 words
An electronic system according to claim 21 wherein each of said cells are intraconnected to provide substantially identical circuit functions and are interconnected to provide said electronic system.
Claim 31
Dependent Claim
122 words
An electronic system comprising LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrated in spaced-apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of Said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column, a conductive pattern on said insulating material interconnecting said cells into said electronic system and including at least one conductor that winds along said runways.
Claim 32
Dependent Claim
122 words
An electronic system comprising LSI array of cells arranged in coordinate rows and columns with runways positioned between each row, said cells each including a plurality of first conductivity-type semiconductor regions in one surface of a second conductivity-type semiconductor substrated in spaced-apart relation to form plural conduction paths, insulating material overlying said one surface and having access apertures therethrough positioned above said regions, at least one semiconductor region of Said first conductivity type extending under one of said runways and being common to a conduction path in each of a pair of adjacent cells in a column, a conductive pattern on said insulating material interconnecting said cells into said electronic system and including at least one conductor that winds along said runways.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-02-14 | 1975-08-16 | 1976-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-02-14 | 1979-08-16 | 1980-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-02-14 | 1983-08-16 | 1984-02-15 | $7700.00 | Window Closed / Lapsed |