US3638301A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for manufacturing a variable capacitance diode
Assignee: Hitachi Ltd
•
Filing: 1970-06-29
•
Granted: 1972-02-01
•
Expires: 1990-06-29
Abstract
Abstract A variable capacitance diode having an improved stepped junction therein formed by epitaxially depositing a P type layer on a N+ silicon substrate, forming an N+ type layer on the P type layer, heating the produced segment to a high temperature to cause the impurities contained in the N+ type layer and the N+ type substrate to diffuse into the P type layer, whereby the P type layer is converted to an N type layer, and thereafter forming a P+ type layer on the N+ type layer.
Inventors
- 👤 Shigeo Matsuura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 16:15
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/62; H10D1/64; Y; Y10; Y10S; Y10S148/00; Y10S148/007; Y10S148/037; Y10S148/085; Y10S148/098; Y10S148/145; Y10S438/00; Y10S438/914; Y10S438/916
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
53 words
The method according to claim 1, wherein said substrate has a specific resistance not more than 0.02 ohm-cm., said first semiconductor layer has a specific resistance of 0.5 to 3.0 ohm-cm. and a thickness of 1.0 to 5.0 microns, and said second semiconductor layer has a specific resistance of 0.6 to 0.001 ohm-cm.
Claim 2
Dependent Claim
14 words
The method according to claim 1, wherein said substrate is made of N-type silicon.
Claim 3
Dependent Claim
28 words
A method according to claim 1, wherein said second semiconductor layer is formed by epitaxially depositing said second semiconductor layer on the surface of said first semiconductor layer.
Claim 4
Dependent Claim
27 words
A method according to claim 1, wherein said second semiconductor layer is formed by diffusing said second semiconductor layer into the surface of said first semiconductor layer.
Claim 5
Dependent Claim
27 words
A method according to claim 4, wherein said third semiconductor layer is formed by diffusing said third semiconductor layer into the surface of said second semiconductor layer.
Claim 6
Dependent Claim
22 words
A method according to claim 3, wherein said N-type substrate has an impurity concentration of not less than 2 X 1018 atoms/cm.3.
Claim 7
Dependent Claim
29 words
A method according to claim 7, wherein said second semiconductor layer is made of P-type silicon having an impurity concentration of 3 X 1015 to 4 X 1016 atoms/cm.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-31 | 1975-08-02 | 1976-02-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-31 | 1979-08-02 | 1980-02-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-31 | 1983-08-02 | 1984-02-01 | $7700.00 | Window Closed / Lapsed |