Automatic dc level controlling system for a dc-coupled amplifier

Claim 2

An automatic DC level control system for a DC-coupled amplifier, comprising: a bidirectional counter; a comparator means coupled to the output of said amplifier for comparing the DC voltage level at the output of said amplifier with a first reference voltage so as to provide a first output signal at an output thereof when the amplifier DC voltage exceeds said first reference voltage and with a second reference voltage so as to provide a second output signal at the output theReof when the amplifier DC voltage drops below said second reference voltage; an oscillator for generating clock pulses; gating means having a first input connected to the output of said oscillator and a second input connected to the output of said comparator means and an output connected to the count trigger input of said counter for gating said clock pulses into said counter responsive to the output of said comparator means; means responsive to the output of said comparator means for controlling the direction of counting of said bidirectional counter; and a digital-to-analog converter connected between the output of said counter and the input of said DC amplifier, thereby controlling the DC level of said amplifier within predetermined limits determined by the selected values of said first and second reference voltages.

Claim 3

An automatic DC level controller as set forth in claim 1 wherein said comparator means includes first and second comparators, each having an inverting and noninverting input and an output; said noninverting input of said first comparator connected to receive said first reference voltage, said inverting input of said second comparator connected to receive said second reference voltage and said inverting input of said first comparator and said noninverting input of said second comparator being coupled to the output of said pulse amplifier; and a NOR-gate having first and second inputs and an output, said first input connected to the output of said first comparator, said second input connected to the output of said second comparator and said output connected to said second input of said gating means.

Claim 4

An automatic DC level controller as set forth in claim 2 wherein the count direction control means of said bidirectional counter is connected to the output of said first comparator circuit, whereby when the DC voltage of said DC amplifier exceeds said first reference voltage said counter is switched from the forward count to the reverse count state.

Claim 5

An automatic DC level controller as set forth in claim 3 further including a first filter circuit for connecting the output of said DC amplifier to the input of said comparator means so as to attenuate the AC signal output of said pulse amplifier, a feedback amplifier connected to the output of said digital-to-analog converter and a second filter circuit connecting the output of said feedback amplifier to the input of said DC amplifier.

Claim 6

An automatic DC level controller as set forth in claim 4 wherein said oscillator clock pulses have a period substantially lower than the time constant of said control system.

Claim 7

An automatic DC level control system for use in an interferometer feedback system wherein a pair of channels are provided for detecting and shaping, respectively, a pair of light interference signals generated by the interferometer and having a quadrature relationship, one signal leading the other depending upon the direction of motion being sensed by the interferometer, each channel including photodetector means for sensing the interference signal, a DC amplifier connected to the output of said photodetector means and a trigger circuit having a predetermined upper nd lower triggering voltage level, said DC level control system comprising: first and second bidirectional counters; first and second comparator means coupled respectively to the outputs of said DC amplifiers of said pair of channels each for comparing the DC voltage level at the output of said DC amplifier with a first reference voltage so as to provide a first output signal at an output thereof when the DC voltage level of said DC amplifier exceeds said first reference signal and with a second reference voltage so as to provide a second output signal at the output thereof when the DC voltage level of said DC amplifier drops below said second reference voltage; an oscillator for generating clock pulses at an output thereof; a first gating means having A first input connected to the output of said oscillator and a second input connected to the output of said first comparator means and an output connected to the count trigger input of said first bidirectional counter for gating said clock pulses into said first counter responsive to the output of said first comparator means; a second gating means having a first input connected to the output of said oscillator and a second input connected to the output of said second comparator means and an output connected to the count trigger input of said second bidirectional counter for gating said clock pulses into said second counter responsive to the output of said second comparator means; means responsive to the outputs of said first and second comparator means for controlling the direction of counting of said first and second bidirectional counters, respectively; and first and second digital-to-analog converters connected, respectively, between the outputs of said first and second counters and the inputs of said first and second channel DC amplifiers.

Claim 8

An automatic DC level control system for use in an interferometer feedback system wherein a pair of channels are provided for detecting and shaping, respectively, a pair of light interference signals generated by the interferometer and having a quadrature relationship, one signal leading the other depending upon the direction of motion being sensed by the interferometer, each channel including photodetector means for sensing the interference signal, a DC amplifier connected to the output of said photodetector means and a trigger circuit having a predetermined upper nd lower triggering voltage level, said DC level control system comprising: first and second bidirectional counters; first and second comparator means coupled respectively to the outputs of said DC amplifiers of said pair of channels each for comparing the DC voltage level at the output of said DC amplifier with a first reference voltage so as to provide a first output signal at an output thereof when the DC voltage level of said DC amplifier exceeds said first reference signal and with a second reference voltage so as to provide a second output signal at the output thereof when the DC voltage level of said DC amplifier drops below said second reference voltage; an oscillator for generating clock pulses at an output thereof; a first gating means having A first input connected to the output of said oscillator and a second input connected to the output of said first comparator means and an output connected to the count trigger input of said first bidirectional counter for gating said clock pulses into said first counter responsive to the output of said first comparator means; a second gating means having a first input connected to the output of said oscillator and a second input connected to the output of said second comparator means and an output connected to the count trigger input of said second bidirectional counter for gating said clock pulses into said second counter responsive to the output of said second comparator means; means responsive to the outputs of said first and second comparator means for controlling the direction of counting of said first and second bidirectional counters, respectively; and first and second digital-to-analog converters connected, respectively, between the outputs of said first and second counters and the inputs of said first and second channel DC amplifiers.

Claim 9

An automatic DC level control system for use in an interferometer feedback system as set forth in claim 6 further including means for disabling the application of said clock pulses to the count trigger input of said first and second bidirectional counters when there is no movement being detected by said interferometer.