Electronic recirculating stores

Claim 2

An electronic storage arrangement comprising: a plurality of multistage data registers of the static, recirculating type operating in parallel, a static, recirculating marking register common to all said data registers for storing and circulating therein a marking bit which is indicative of the stage of a selected data register which is operating at any given point in time, said marking register having a recirculating length which is different from that of said data registers by at least one stage such that synchronous circulation of said data registers and said marking register will cause said marking bit to move in its stage position relative to the data in said data registers with every complete circulation of said data registers, a source of input data for said data registers and gating means responsive to said marking bit for allowing said input data to pass from said source to said data registers.

Claim 3

The arrangement defined in claim 1, wherein said marking register includes a sufficient number of stages as to allow said marking register to be adjusted to be longer or shorter than thE stage length of said data registers, said marking register including means for adjusting said marking register to be longer or shorter than the stage length of said data registers so that said marking bit will be caused to drop back or advance in its position in said marking register relative to the position of the data in said data registers with every circulation of the latter.

Claim 6

The method of claim 3 in which the data registers each comprise n stages, the marking register comprises n+ 2 stages and an adder connected between the output and input of the data registers provides an additional stage, and in which an input set of data is to be accumulated with that already stored in one of the data registers, which further includes the steps of inserting the marking signal in the n+ 2nd stage of the marking register and circulating the data recorded therein through said one register before any accumulation, while advancing the marking signal synchronously therewith until it reaches the first stage of the marking register, then gating the successive digits of the input data into the adder along with the digit then available in the first stage of said one register by the marking signal at the output of that first stage, the data and the marking signal being synchronously shifted during a complete circulation between additions, with the marking signal always being returned to the n+ 2nd stage after it reaches the first stage.

Claim 7

The method of claim 3 in which the data registers each comprise n stages, the marking register comprises n+ 2 stages and an adder connected between the output and input of the data registers provides an additional stage and in which data already stored in one of the data registers is to be transferred to another location, which further includes the steps of initially inserting the marking signal in the nth stage of the marking register and circulating the data recorded therein through said one register before any transfer, while advancing the marking signal synchronously therewith until it reaches the stage in which the most significant digit is recorded in the data register, then successively transferring each digit from the first stage of the data register as the marking signal reaches the first stage of the marking register, the data and the marking signal being synchronously shifted during a complete circulation between transfers, with the marking signal always being returned to the nth stage after it reaches the first stage.