Patent US2360736A successfully refreshed from Google Patents.
Patent US3634770A successfully refreshed from Google Patents.
US3634770A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit arrangement responding to a sgnal peak
Assignee: PE Manufacturing GmbH
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Filing: 1970-01-23
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Granted: 1972-01-11
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Expires: 1990-01-23
Abstract
Abstract A peak detector detects peaks in an analog input signal. The input signal is first amplified and integrated and then applied to a compensating circuit. The compensating circuit includes an analog-to-digtal converter that converts the integrated signal into a corresponding sequence of digital pulses. The digital pulses are counted and stored in a digital counter and then converted by a digital-to-analog converter into a correction signal that is applied to cancel out the input signal. Periodically the compensating circuit is disconnected from the integrator so that a threshold detector, that is coupled to the integrator, can detect an increase or decrease in the amplitude of the input signal as compared to the correction signal. The threshold detector thereby signals the beginning and end of the peaks in the input signal.
Inventors
- 👤 Ernst Spreitzhofer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 22:57
CPC Classifications
H; H03; H03M; H03M1/00; G; G01; G01N; G01N30/00; G01N30/02; G01N30/86; G01N30/8624; G01N30/8631; G01R; G01R17/00; G01R17/02; G01R19/00; G01R19/12; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/12; G05B19/16; G06; G06G; G06G7/00; G06G7/12; G06G7/25; H03M1/12; H03M1/124
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
146 words
A circuit arrangement that detects peaks in an analog input signal comprising in combination a signal-processing circuit having an input to which said input signal is applied, and an output, a compensating circuit coupled to said output for generating and storing a correction signal that corresponds to said input signal, means for applying said correction signal to said input of said signal processing circuit to counteract said input signal to produce substantially no output signal from said output of said signal processing circuit, means for periodically disconnecting said compensating circuit from the output of said signal processing circuit to permit said output signal to increase above and decrease below said correction signal, a threshold circuit coupled to said output of said signal processing circuit to detect increases and decreases in said input signal that exceeds said threshold so a to detect peaks in said input signal.
Claim 2
Dependent Claim
146 words
A circuit arrangement that detects peaks in an analog input signal comprising in combination a signal-processing circuit having an input to which said input signal is applied, and an output, a compensating circuit coupled to said output for generating and storing a correction signal that corresponds to said input signal, means for applying said correction signal to said input of said signal processing circuit to counteract said input signal to produce substantially no output signal from said output of said signal processing circuit, means for periodically disconnecting said compensating circuit from the output of said signal processing circuit to permit said output signal to increase above and decrease below said correction signal, a threshold circuit coupled to said output of said signal processing circuit to detect increases and decreases in said input signal that exceeds said threshold so a to detect peaks in said input signal.
Claim 3
Dependent Claim
17 words
A circuit arrangement as claimed in claim 1, wherein: said signal processing circuit includes an integrator circuit.
Claim 4
Dependent Claim
65 words
A circuit arrangement as claimed in claim 1 wherein: said compensating circuit includes an analog-to-digital converter coupled to the output of said signal processing circuit for generating a sequence of digital pulses corresponding to said input signal, a digital counter coupled to said converter, for counting said pulses, and a digital-to-analog converter coupled to said counter for converting said count into an analog correction signal.
Claim 5
Dependent Claim
59 words
A circuit arrangement as claimed in claim 3, wherein said threshold circuit includes first and second trigger circuits coupled to said output of said signal-processing circuit for triggering on positive and negative excursions respectively of said input signal that exceed predetermined thresholds, and a logic circuit coupled to said trigger circuits to signal the activation of said trigger circuits.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-10 | 1975-07-12 | 1976-01-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-10 | 1979-07-12 | 1980-01-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-10 | 1983-07-12 | 1984-01-11 | $7700.00 | Window Closed / Lapsed |