Multiple timing list arrangement

Claim 3

The method in accordance with claim 1, wherein timing of said operation is suspended during a repetition of said determining, processing, and updating steps, comprising the further apparatus steps of calculating the remaining portion of said prescribed interval for said operation, storing a representation of said calculated portion of said prescribed interval, and suspending timing for said operation by removing said identification of said operation from the defined list after said storing of said representation.

Claim 4

The method in accordance with claim 2, wherein timing of said operation is recommenced after said suspension, comprising the further apparatus steps of retrieving said representation of said calculated portion of said prescribed interval, ascertaining a particular one of said lists to be processed at the termination of said calculated portion of said prescribed interval, and recommencing timing of said operation by again storing said identification of said operation in the ascertained list, said determining, processing, and updating steps being successively repeated at said predetermined equal time intervals after said identification is again stored.

Claim 5

In a system having a plurality of service circuits and a stored program processor including a memory for supervising the operation of said system, wherein a portion of said processor memory is allocated for a plurality of service circuit registers corresponding to said service circuits, a plurality of head cells, each identifying a timing list of said registers, and a word updated at predetermined equal time intervals to identify the head cell of the next list to be processed, a method for controlling apparatus to mark said memory to enable said processor to time an operation of a given service circuit in accordance with a timing request specifying a time interval, comprising the apparatus steps of storing time interval data in the register corresponding to said given service circuit in accordance with said timing request, determining the next list to be processed by examining said word after said storing, defining, after said determining, in accordance with said time interval data and the determined list, a one of said lists to be processed at the end of said specified time interval, commencing timing of said specified time interval for said operation of said given service circuit by inserting said register corresponding to said given service circuit in the defined list, ascertaining the next list to be processed by examining the head cell identified by said word, processing the registers on the ascertained list to recognize the expiration of said specified time interval for said register on the defined list, and updating the contents of said word after said processing to identify a succeeding one of said head cells, said ascertaining, processing, and updating steps being successively repeated at said predetermined equal time intervals.

Claim 6

In a system having a plurality of service circuits and a stored program processor including a memory for supervising the operation of said system, wherein a portion of said processor memory is allocated for a plurality of service circuit registers corresponding to said service circuits, a plurality of head cells, each identifying a timing list of said registers, and a word updated at predetermined equal time intervals to identify the head cell of the next list to be processed, a method for controlling apparatus to mark said memory to enable said processor to time an operation of a given service circuit in accordance with a timing request specifying a time interval, comprising the apparatus steps of storing time interval data in the register corresponding to said given service circuit in accordance with said timing request, determining the next list to be processed by examining said word after said storing, defining, after said determining, in accordance with said time interval data and the determined list, a one of said lists to be processed at the end of said specified time interval, commencing timing of said specified time interval for said operation of said given service circuit by inserting said register corresponding to said given service circuit in the defined list, ascertaining the next list to be processed by examining the head cell identified by said word, processing the registers on the ascertained list to recognize the expiration of said specified time interval for said register on the defined list, and updating the contents of said word after said processing to identify a succeeding one of said head cells, said ascertaining, processing, and updating steps being successively repeated at said predetermined equal time intervals.

Claim 7

The method in accordance with claim 4, wherein said register corresponding to said given service circuit is removed from said defined list to suspend timing for said register corresponding to said given service circuit during a repetition of said ascertaining, processing, and updating steps, comprising the further apparatus steps of calculating the remaining portion of said specified time interval for said register corresponding to said given service circuit from the contents of said word, an identification of said defined list and said specified time interval data in said register Corresponding to said given service circuit, storing a representation of said calculated portion of said specified time interval in said register corresponding to said given service circuit, and suspending timing for said register corresponding to said given service circuit by removing said register corresponding to said given service circuit from said defined list after the immediately preceding step of storing.

Claim 8

The method in accordance with claim 5, wherein timing is recommenced for said register corresponding to said given service circuit after said suspension, comprising the further apparatus steps of storing said representation of said calculated portion of said specified time interval in said register corresponding to said given service circuit as time interval data, and specifying a particular one of said lists to be processed at the termination of said calculated portion of said specified time interval, recommencing timing for said register corresponding to said given service circuit by again inserting said register corresponding to said given service circuit in said specified list, said ascertaining, processing, and updating steps being successively repeated at said predetermined equal time interval after said register corresponding to said given service circuit is again inserted in a list.

Claim 9

In a real-time processing system having a plurality of service circuits and a stored program processor including a memory for supervising the operation of said system, wherein a portion of the processor memory is allocated for a plurality of service circuit register corresponding to said service circuits, 60 head cells, each specifying a timing list of said registers, and a modulo-60 counter advanced at one-second intervals for identifying the head cell of the next list to be processed, a method for controlling apparatus to mark said memory to enable said processor to time an operation of a given service circuit in accordance with a timing request specifying a time interval in minutes and seconds, comprising the apparatus steps of storing in the register corresponding to said given service circuit a representation of said specified minutes, adding the contents of said counter to said specified seconds after said storing, identifying one of said head cells in accordance with the result of the preceding step of adding, inserting said register corresponding to said given service circuit in the list defined by said one cell, determining the next list to be processed by examining the head cell identified by said counter, processing the registers on the determined list to recognize the expiration of the specified minutes for said register on the list defined by said one head cell, and advancing said counter after said processing to identify a succeeding one of said head cells, said determining, processing, and advancing steps being successively repeated at one-second intervals.

Claim 10

In a real-time processing system having a plurality of service circuits and a stored program processor including a memory for supervising the operation of said system, wherein a portion of the processor memory is allocated for a plurality of service circuit register corresponding to said service circuits, 60 head cells, each specifying a timing list of said registers, and a modulo-60 counter advanced at one-second intervals for identifying the head cell of the next list to be processed, a method for controlling apparatus to mark said memory to enable said processor to time an operation of a given service circuit in accordance with a timing request specifying a time interval in minutes and seconds, comprising the apparatus steps of storing in the register corresponding to said given service circuit a representation of said specified minutes, adding the contents of said counter to said specified seconds after said storing, identifying one of said head cells in accordance with the result of the preceding step of adding, inserting said register corresponding to said given service circuit in the list defined by said one cell, determining the next list to be processed by examining the head cell identified by said counter, processing the registers on the determined list to recognize the expiration of the specified minutes for said register on the list defined by said one head cell, and advancing said counter after said processing to identify a succeeding one of said head cells, said determining, processing, and advancing steps being successively repeated at one-second intervals.