Patent US3633050A successfully refreshed from Google Patents.
US3633050A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Time delay circuit with normally conducting fet gated off during time delay period
Assignee: Robertshaw Controls Co
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Filing: 1970-01-12
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Granted: 1972-01-04
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Expires: 1990-01-12
Abstract
Abstract A solid-state timer is provided using a field-effect transistor connected to be biased ''''on'''' and during the timed period held ''''off'''' by a prior charged capacitor. The operating condition of the field-effect transistor determines the operative status of a second transistor connected to a relay. A transient bypass filter is provided at the input of the second transistor. The relay is provided with a contact connected to provide a holding circuit so only momentary operation of a time period initiating switch is needed.
Inventors
- 👤 Chester J Zajac
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 11:17
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/28
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
164 words
A timing circuit including means providing a DC voltage from an AC source, a field-effect transistor, means connected to said field-effect transistor and said first-mentioned means providing positive biasing of said field-effect transistor to the ''''on'''' operating mode, said field-effect transistor having gate, drain and source electrodes, a circuit portion including a capacitor having one side connected to said gate electrode, a switch connecting said capacitoR to said DC voltage for charging via said gate and source electrodes, said switch having two connecting positions, one of which when used connects said capacitor for charging said capacitor via said gate and source electrodes and the other switch position when used connects said capacitor for discharge and connects said capacitor so the voltage on said capacitor biases said field-effect transistor in the ''''off'''' operating mode until the voltage on said capacitor discharges to a level to cause said field-effect transistor to revert to the ''''on'''' operating mode, the ''''off'''' to ''''on'''' periods providing a timed period.
Claim 2
Dependent Claim
164 words
A timing circuit including means providing a DC voltage from an AC source, a field-effect transistor, means connected to said field-effect transistor and said first-mentioned means providing positive biasing of said field-effect transistor to the ''''on'''' operating mode, said field-effect transistor having gate, drain and source electrodes, a circuit portion including a capacitor having one side connected to said gate electrode, a switch connecting said capacitoR to said DC voltage for charging via said gate and source electrodes, said switch having two connecting positions, one of which when used connects said capacitor for charging said capacitor via said gate and source electrodes and the other switch position when used connects said capacitor for discharge and connects said capacitor so the voltage on said capacitor biases said field-effect transistor in the ''''off'''' operating mode until the voltage on said capacitor discharges to a level to cause said field-effect transistor to revert to the ''''on'''' operating mode, the ''''off'''' to ''''on'''' periods providing a timed period.
Claim 3
Dependent Claim
42 words
A timing circuit in accordance with claim 1 wherein said means providing positive biasing includes a resistor connected to said gate electrode, said resistor, said gate electrode and said source electrode forming a series circuit which is connected across said DC voltage.
Claim 4
Dependent Claim
16 words
A timing circuit in accordance with claim 1 wherein said switch is a magnetically controlled switch.
Claim 5
Dependent Claim
222 words
A time controlled switching circuit including means providing a DC voltage from an AC source, a field-effect transistor having gate, drain and source electrodes, means connected to said field-effect transistor and said first-mentioned means providing positive biasing of said field-effect transistor to the ''''on'''' operating mode, an electromechanical switching device including a winding and a switch having two connecting positions controlled in accordance with the level of current flow through said winding, means including a semiconductor device connected to said field-effect transistor controlling the level of current flow through said winding, a circuit portion including a capacitor having one side connected to said gate electrode with the other side connected by one position of said switch to said DC voltage for charging via said gate and source electrodes and said other side connected by the other position of switch for discharging said capacitor and connecting said capacitor so the voltage on said capacitor biases said field-effect transistor in the ''''off'''' operating mode until the voltage on said capacitor discharges to a level to cause said field-effect transistor to revert to the ''''on'''' operating mode, the ''''off'''' to ''''on'''' periods providing a timed period, and a normally open second switch providing, when closed, an electrical path equivalent to that provided by said two-position switch when said two-position switch is in said other position.
Claim 6
Dependent Claim
222 words
A time controlled switching circuit including means providing a DC voltage from an AC source, a field-effect transistor having gate, drain and source electrodes, means connected to said field-effect transistor and said first-mentioned means providing positive biasing of said field-effect transistor to the ''''on'''' operating mode, an electromechanical switching device including a winding and a switch having two connecting positions controlled in accordance with the level of current flow through said winding, means including a semiconductor device connected to said field-effect transistor controlling the level of current flow through said winding, a circuit portion including a capacitor having one side connected to said gate electrode with the other side connected by one position of said switch to said DC voltage for charging via said gate and source electrodes and said other side connected by the other position of switch for discharging said capacitor and connecting said capacitor so the voltage on said capacitor biases said field-effect transistor in the ''''off'''' operating mode until the voltage on said capacitor discharges to a level to cause said field-effect transistor to revert to the ''''on'''' operating mode, the ''''off'''' to ''''on'''' periods providing a timed period, and a normally open second switch providing, when closed, an electrical path equivalent to that provided by said two-position switch when said two-position switch is in said other position.
Claim 7
Dependent Claim
18 words
A time controlled switching circuit in accordance with claim 4 wherein said second switch is momentary actuatable switch.
Claim 8
Dependent Claim
53 words
A time controlled switching circuit in accordance with claim 4 wherein said means including a semiconductor device responds to said field-effect transistor when in said ''''off'''' operating mode causing the level of current flow through said winding to be such as to cause said two-position switch to be placed in said other position.
Claim 9
Dependent Claim
45 words
A time controlled switching circuit in accordance with claim 4 wherein said first-mentioned means providing positive biasing includes a resistor connected to said gate electrode, said resistor, said gate electrode and said source electrode forming a series circuit which is connected across said DC voltage.
Claim 10
Dependent Claim
26 words
A time controlled switching circuit in accordance with claim 4 wherein said means including a semiconductor device includes a bypass filter connected to said semiconductor device.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-01-03 | 1975-07-05 | 1976-01-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-01-03 | 1979-07-05 | 1980-01-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-01-03 | 1983-07-05 | 1984-01-04 | $7700.00 | Window Closed / Lapsed |