Patent US3631407A successfully refreshed from Google Patents.
US3631407A
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US
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Character memory of reduced size
Assignee: Corning Glass Works
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Filing: 1969-06-25
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Granted: 1971-12-28
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Expires: 1989-06-25
Abstract
Abstract Read-only memory size reduction based on the implication theory of logical mathematics. A different designation number is generated by the memory in response to the application of an interrogation pulse to each of the word line input terminals. If one of the designation numbers implies another designation number, then the latter may be generated from the former with a cross-point impedance element saving which equals the number of logical bits that are common to both designation numbers.
Inventors
- 👤 Douglas A Cotter
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:20
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/06
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
206 words
In a read-only memory of the type consisting of a plurality of word lines crossing a plurality of bit lines and a plurality of input terminals respectively connected to said plurality of word lines for receiving interrogation pulses, wherein ''''1''s'''' are stored in said memory by the connection of cross-point impedance elements between selected ones of said word lines and bit lines, the improvement comprising unilaterally conducting impedance means connected between at least a first and a second of said plurality of word lines, said unilaterally conducting impedance means presenting a low impedance to interrogation pulses applied to the terminal associated with said first word line so that the application of an interrogation pulse to said first word line generates a readout pulse in those of said bit lines which are connected by said cross-point impedance elements to both said first and said second word lines, and said unilaterally conducting impedance means presenting a high impedance to interrogation pulses applied to the terminal associated with said second word line so that the application of an interrogation pulse to said second word line generates a readout pulse in only those of said bit lines which are connected by said cross-point impedance elements to said second word line.
Claim 2
Dependent Claim
206 words
In a read-only memory of the type consisting of a plurality of word lines crossing a plurality of bit lines and a plurality of input terminals respectively connected to said plurality of word lines for receiving interrogation pulses, wherein ''''1''s'''' are stored in said memory by the connection of cross-point impedance elements between selected ones of said word lines and bit lines, the improvement comprising unilaterally conducting impedance means connected between at least a first and a second of said plurality of word lines, said unilaterally conducting impedance means presenting a low impedance to interrogation pulses applied to the terminal associated with said first word line so that the application of an interrogation pulse to said first word line generates a readout pulse in those of said bit lines which are connected by said cross-point impedance elements to both said first and said second word lines, and said unilaterally conducting impedance means presenting a high impedance to interrogation pulses applied to the terminal associated with said second word line so that the application of an interrogation pulse to said second word line generates a readout pulse in only those of said bit lines which are connected by said cross-point impedance elements to said second word line.
Claim 3
Dependent Claim
43 words
A read-only memory in accordance with claim 1 wherein said unilaterally conducting impedance means is a diode, one terminal of which is directly connected to said first word line and the other terminal of which is directly connected to said second word line.
Claim 4
Dependent Claim
15 words
A read-only memory in accordance with claim 2 wherein said cross-point impedance elements are diodes.
Claim 5
Dependent Claim
26 words
A read-only memory in accordance with claim 1 wherein no bit line is connected by cross-point impedances to both said first and said second word lines.
Claim 6
Dependent Claim
204 words
In a read-only memory comprising a plurality of word lines, a plurality of bit lines, cross-point impedance elements connecting those of said word lines to those of said bit lines where ''''1''s'''' are to be stored, and a plurality of input terminals respectively connected to said plurality of word lines for receiving interrogation pulses, wherein a unique designation number in the form of a series of ''''1''s'''' and ''''0''s'''' is generated on said bit lines in response to the application of an interrogation pulse to a particular one of said word lines, and wherein the designation number generated by the application of an interrogation pulse to at least one of said word lines implies the designation number generated by the application of an interrogation pulse to at least one other of said word lines, the improvement comprising unilaterally conducting impedance means for transmitting an interrogation pulse applied to said one other word line to said one word line and impeding the transmission of an interrogation pulse from said one word line to said one other word line, said unilaterally conducting impedance means having a first terminal connected directly to said first word line and a second terminal connected directly to said second word line.
Claim 7
Dependent Claim
204 words
In a read-only memory comprising a plurality of word lines, a plurality of bit lines, cross-point impedance elements connecting those of said word lines to those of said bit lines where ''''1''s'''' are to be stored, and a plurality of input terminals respectively connected to said plurality of word lines for receiving interrogation pulses, wherein a unique designation number in the form of a series of ''''1''s'''' and ''''0''s'''' is generated on said bit lines in response to the application of an interrogation pulse to a particular one of said word lines, and wherein the designation number generated by the application of an interrogation pulse to at least one of said word lines implies the designation number generated by the application of an interrogation pulse to at least one other of said word lines, the improvement comprising unilaterally conducting impedance means for transmitting an interrogation pulse applied to said one other word line to said one word line and impeding the transmission of an interrogation pulse from said one word line to said one other word line, said unilaterally conducting impedance means having a first terminal connected directly to said first word line and a second terminal connected directly to said second word line.
Claim 8
Dependent Claim
17 words
A read-only memory in accordance with claim 5 wherein said unilaterally conducting impedance means is a diode.
Claim 9
Dependent Claim
86 words
In a read-only memory comprising a plurality of word lines, a plurality of bit lines, cross-point impedance elements connecting those of said word lines to those of said bit lines where ''''1''s'''' are to be stored, and a plurality of terminals respectively connected to said plurality of word lines for receiving interrogation pulses, the improvement comprising a diode having one terminal directly connected to a first of said word lines, the other terminal of said diode being directly connected to a second of said word lines.
Claim 10
Dependent Claim
86 words
In a read-only memory comprising a plurality of word lines, a plurality of bit lines, cross-point impedance elements connecting those of said word lines to those of said bit lines where ''''1''s'''' are to be stored, and a plurality of terminals respectively connected to said plurality of word lines for receiving interrogation pulses, the improvement comprising a diode having one terminal directly connected to a first of said word lines, the other terminal of said diode being directly connected to a second of said word lines.
Claim 11
Dependent Claim
26 words
A read-only memory in accordance with claim 7 wherein no bit line is connected by cross-point impedances to both said first and said second word lines.
Claim 12
Dependent Claim
54 words
A read-only memory in accordance with claim 8 further comprising a plurality of input diodes, one of which connects each of said plurality of terminals to its associated word line, the polarity of said input diodes being such that interrogation pulses applied to said terminals conduct through said input diodes to said word lines.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-12-27 | 1975-06-28 | 1975-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-12-27 | 1979-06-28 | 1979-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-12-27 | 1983-06-28 | 1983-12-28 | $7700.00 | Window Closed / Lapsed |