Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
215 words
Dynamic level control circuit for multichannel stereophonic amplifiers comprising a first stereo input channel (15, 1); a second stereo input channel (15'', 1''); a single automatic gain control (AGC) amplifier including a control transistor (8); similar first and second coupling circuits (2, 3, 4); (2'', 3'', 4''), from each of said input channels (15, 1), (15'', 1''), including first and second diodes (6, 6''), one each having like first terminals connected to the control electrode of the control transistor (8), the diodes being poled to apply opposite half-wave signals from said channels to the transistor to control said single AGC amplifier by said half-wave signals from the respective first and second channels, but blocking signals from one channel to the other to inhibit mutual interference of said channels; a pair of bypass diodes (5, 5'') having like second electrodes connected together and to the emitter of the control transistor (8); a condenser (4, 4''), each, interconnecting the signals from each said stereo channels and connected to the respective junctions (A, A'') of the first electrodes of the bypass diodes (5, 5'') with the second electrodes of the first and second diodes (6, 6''); and means deriving an output from said control transistor (8) and connecting said output to said channels to affect the gain thereof.
Claim 2
Dependent Claim
215 words
Dynamic level control circuit for multichannel stereophonic amplifiers comprising a first stereo input channel (15, 1); a second stereo input channel (15'', 1''); a single automatic gain control (AGC) amplifier including a control transistor (8); similar first and second coupling circuits (2, 3, 4); (2'', 3'', 4''), from each of said input channels (15, 1), (15'', 1''), including first and second diodes (6, 6''), one each having like first terminals connected to the control electrode of the control transistor (8), the diodes being poled to apply opposite half-wave signals from said channels to the transistor to control said single AGC amplifier by said half-wave signals from the respective first and second channels, but blocking signals from one channel to the other to inhibit mutual interference of said channels; a pair of bypass diodes (5, 5'') having like second electrodes connected together and to the emitter of the control transistor (8); a condenser (4, 4''), each, interconnecting the signals from each said stereo channels and connected to the respective junctions (A, A'') of the first electrodes of the bypass diodes (5, 5'') with the second electrodes of the first and second diodes (6, 6''); and means deriving an output from said control transistor (8) and connecting said output to said channels to affect the gain thereof.
Claim 3
Dependent Claim
29 words
Circuit according to claim 1, including an adjustable resistance (7) in the connection between the first and second diodes (6, 6'') and the base of the control transistor (8).
Claim 4
Dependent Claim
79 words
Circuit according to claim 1, wherein: the AGC circuit includes a further transistor (11) connected in an amplifying circuit to said control transistor (8); a variable, tapped resistance (12) is provided, having its tap point connected to the emitter-collecter circuit of said further transistor (11); and means (13) are provided interconnecting the end points of said tapped resistance to respective ones of a pair of AGC output transistors, said output transistors controlling the gain of the respective stereo channels.