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US3629718A Expired / Lapsed US ⏱️ 0.0 years remaining

Multichannel dynamic level control circuit

Assignee: Blaupunkt Werke GmbH
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Filing: 1970-01-22
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Granted: 1971-12-21
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Expires: 1990-01-22
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Abstract

Abstract To enable use of a single automatic gain control amplifier in stereo, and other multichannel apparatus, a control transistor is provided, having similar input coupling circuits, connected to the various channels, over condenser-diode networks, the diodes being so poled that only a half wave of the signal from any one channel is applied to the control transistor, and signal feed back from one channel to another is inhibited, the serial path between two channels being formed by serially connected, oppositely poled diodes; preferably, the AGC output stage has a center tapped, adjustable resistance as its input, compensation for inequality between amplifier characteristics with respect to the various channels being done by adjusting the exact position of the center tap.

Inventors

  • 👤 Eberhard Klein
  • 👤 Hans-J Zabel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 09:21
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/68; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G3/301; H03G3/3015

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 215 words
Dynamic level control circuit for multichannel stereophonic amplifiers comprising a first stereo input channel (15, 1); a second stereo input channel (15'', 1''); a single automatic gain control (AGC) amplifier including a control transistor (8); similar first and second coupling circuits (2, 3, 4); (2'', 3'', 4''), from each of said input channels (15, 1), (15'', 1''), including first and second diodes (6, 6''), one each having like first terminals connected to the control electrode of the control transistor (8), the diodes being poled to apply opposite half-wave signals from said channels to the transistor to control said single AGC amplifier by said half-wave signals from the respective first and second channels, but blocking signals from one channel to the other to inhibit mutual interference of said channels; a pair of bypass diodes (5, 5'') having like second electrodes connected together and to the emitter of the control transistor (8); a condenser (4, 4''), each, interconnecting the signals from each said stereo channels and connected to the respective junctions (A, A'') of the first electrodes of the bypass diodes (5, 5'') with the second electrodes of the first and second diodes (6, 6''); and means deriving an output from said control transistor (8) and connecting said output to said channels to affect the gain thereof.
Claim 2
Dependent Claim 215 words
Dynamic level control circuit for multichannel stereophonic amplifiers comprising a first stereo input channel (15, 1); a second stereo input channel (15'', 1''); a single automatic gain control (AGC) amplifier including a control transistor (8); similar first and second coupling circuits (2, 3, 4); (2'', 3'', 4''), from each of said input channels (15, 1), (15'', 1''), including first and second diodes (6, 6''), one each having like first terminals connected to the control electrode of the control transistor (8), the diodes being poled to apply opposite half-wave signals from said channels to the transistor to control said single AGC amplifier by said half-wave signals from the respective first and second channels, but blocking signals from one channel to the other to inhibit mutual interference of said channels; a pair of bypass diodes (5, 5'') having like second electrodes connected together and to the emitter of the control transistor (8); a condenser (4, 4''), each, interconnecting the signals from each said stereo channels and connected to the respective junctions (A, A'') of the first electrodes of the bypass diodes (5, 5'') with the second electrodes of the first and second diodes (6, 6''); and means deriving an output from said control transistor (8) and connecting said output to said channels to affect the gain thereof.
Claim 3
Dependent Claim 29 words
Circuit according to claim 1, including an adjustable resistance (7) in the connection between the first and second diodes (6, 6'') and the base of the control transistor (8).
Claim 4
Dependent Claim 79 words
Circuit according to claim 1, wherein: the AGC circuit includes a further transistor (11) connected in an amplifying circuit to said control transistor (8); a variable, tapped resistance (12) is provided, having its tap point connected to the emitter-collecter circuit of said further transistor (11); and means (13) are provided interconnecting the end points of said tapped resistance to respective ones of a pair of AGC output transistors, said output transistors controlling the gain of the respective stereo channels.

References Cited (Backward Citations)

US2491918A Cited
US2768249A Cited
US2935697A Cited
US3509289A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-12-20 1975-06-21 1975-12-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-12-20 1979-06-21 1979-12-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-12-20 1983-06-21 1983-12-21 $7700.00 Window Closed / Lapsed

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