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US3625124A Expired / Lapsed US ⏱️ 0.0 years remaining

Shutter timing mechanism using inverse feedback circuit

Assignee: Pentax Corp
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Filing: 1969-06-26
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Granted: 1971-12-07
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Expires: 1989-06-26
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Abstract

Abstract A light responsive shutter control comprises a control circuit including a photoconductor coupled to a log compression network, a variable resistance network and a transistor network providing an output responsive to the resistances of the photoconductor and resistance network. The control circuit output charges a memory capacitor connected across the input of a high input impedance amplifier whose output controls a current control transistor whose output electrode is connected to a voltage source through a log expansion network. The output of the current control transistor is connected in inverse feedback to the control circuit and to indicating means and alternatively to a shutter release control transistor switch.

Inventors

  • 👤 Seinan Miyakawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 16:16
CPC Classifications
G; G03; G03B; G03B7/00; G03B7/08; G03B7/081; G03B7/083

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 93 words
An automatic shutter timing mechanism comprising a control network including a light responsive section including a photosensitive element and a log compression circuit and a variable resistance adjustment section and means for combining the outputs of said sections, a memory capacitor chargeable in response to said control network, an amplifier network responsive to the charge on said memory capacitor connected in inverse feedback to said control network and comprising an output section including a current control device and a log expansion circuit, and shutter closure release means responsive to said current control device.
Claim 2
Dependent Claim 93 words
An automatic shutter timing mechanism comprising a control network including a light responsive section including a photosensitive element and a log compression circuit and a variable resistance adjustment section and means for combining the outputs of said sections, a memory capacitor chargeable in response to said control network, an amplifier network responsive to the charge on said memory capacitor connected in inverse feedback to said control network and comprising an output section including a current control device and a log expansion circuit, and shutter closure release means responsive to said current control device.
Claim 3
Dependent Claim 27 words
The timing mechanism of claim 1 wherein said photosensitive element comprises a photoconductor and said log compression circuit comprises a diode in series connection with said photoelement.
Claim 4
Dependent Claim 48 words
The timing network of claim 1 wherein said current control device comprises a transistor including an output electrode and said log expansion circuit comprises a diode connected to an output electrode of said transistor, the output of said inverse feedback amplifier being derived from said transistor output electrode.
Claim 5
Dependent Claim 49 words
The timing network of claim 1 wherein said closure release means comprises a timing capacitor, means for alternatively connecting the output of said current control device to said control network and to said timing capacitor and a shutter closure release member responsive to the change on said timing capacitor.
Claim 6
Dependent Claim 15 words
The timing network of claim 1 including indicating means responsive to said current control device.
Claim 7
Dependent Claim 179 words
An electric shutter comprising a photoelectric current circuit including a photosensitive element located in the path of light coming through an objective from a scene to be photographed and a log compression circuit serially connected to said photosensitive element, a current control circuit including a current control element such as a transistor and a log expanding circuit serially connected to said current control element, a variable resistance group of which resistance values are adjustable depending upon photographing requirements other than brightness of the scene to be photographed inserted in parallel into a data output terminal of said photoelectric circuit, a memory section including a capacitor for memory and an amplifying circuit of high-input impedance through which memory section a feedback of combined output of the data output of said photoelectric circuit and the data output of said variable resistance group to a control pole of said current control element is effected, and a timing capacitor for accomplishing the control of exposurement time with control current of said current control element for which said feedback is held during shutter release.
Claim 8
Dependent Claim 179 words
An electric shutter comprising a photoelectric current circuit including a photosensitive element located in the path of light coming through an objective from a scene to be photographed and a log compression circuit serially connected to said photosensitive element, a current control circuit including a current control element such as a transistor and a log expanding circuit serially connected to said current control element, a variable resistance group of which resistance values are adjustable depending upon photographing requirements other than brightness of the scene to be photographed inserted in parallel into a data output terminal of said photoelectric circuit, a memory section including a capacitor for memory and an amplifying circuit of high-input impedance through which memory section a feedback of combined output of the data output of said photoelectric circuit and the data output of said variable resistance group to a control pole of said current control element is effected, and a timing capacitor for accomplishing the control of exposurement time with control current of said current control element for which said feedback is held during shutter release.

References Cited (Backward Citations)

US3086179A Cited
US3213391A Cited
US3347141A Cited
US3422356A Cited
US3439280A Cited
US3479525A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-12-06 1975-06-07 1975-12-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-12-06 1979-06-07 1979-12-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-12-06 1983-06-07 1983-12-07 $7700.00 Window Closed / Lapsed

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