Phase converter with a reflected binary code output

Claim 2

A circuit for converting the phase difference between a reference signal and a second signal, phase-shifted with respect to said reference signal, into a multibit representation, comprising: first means responding to a first reference signal supplied thereto for producing a first set of harmonics, including a plurality of even-numbered harmonics of said reference signal, each even-numbered harmonic in said first set being twice a lower harmonic in the set; second means responding to a second signal, phase-shifted with respect to said first reference signal, supplied thereto for providing a second set of harmonics, including a plurality of even-numbered harmonics of said phase-shifted signal, each even harmonic in said second set being twice a lower harmonic in the set; third means coupled to said first and second means for combining pairs of corresponding harmonics in the first and second sets to provide for each pair of corresponding even-numbered harmonics an output signal whose characteristics are a function of the phase difference between the first and second signals and the number of the harmonics pair; fourth means for combining the fundamental harmonics of said first and second signals to provide a pair of output signals which are functions of the phase difference therebetween; and output means to which the output signals of said third and fourth means are directly supplied for directly providing a one-bit representation for each output signal as a function of its characteristics.

Claim 3

The arrangement as recited in claim 1 wherein said output means provide a representation of N+2 bits wherein N log2M, being the largest even-numbered harmonic produced by each of first and second means.

Claim 4

The arrangement as recited in claim 2 wherein said N+2 bit representation is in a reflected binary code.

Claim 5

The arrangement as recited in claim 1 wherein said fourth means combine the fundamental harmonics of said first and second signals to provide first and second output signals which are functions of the cosine and sine of the phase difference between said first and second signals and each output signal provided by said third means is expressable as V Rho , where V Rho 1/2 cos(2x psi ), psi is the phase difference and x log2 Rho , Rho being the even number of the corresponding harmonics pair which are combined by the third means to produce the output signal V Rho .

Claim 6

The arrangement as recited in claim 4 wherein said output means provide a representation of N+2 bits, wherein N log2M, and M is the largest even harmonics produced by said first and second means.

Claim 7

The arrangement as recited in claim 5 wherein said N+2 bit representation is in a reflected binary code.

Claim 8

An analog-to-digital converter comprising: input means for receiving an analog input signal; a source of a reference sinusoidal signal; and circuit means to which said input signal and said reference signal are applied for generating even-numbered harmonics for each signal, combining corresponding harmonics of the two signals and directly generating one bit representations for each corresponding combined harmonics, said one-bit representation defining a reflected binary code, said circuit means comprises first means responding to said reference signal for producing a first set including at least a plurality of numbered even harmonics of said reference signal, each even harmonics in said first set being twice a lower harmonics in the set, second means responding to said input signal, which is phase-shifted with respect to said first signal fOr providing a second set harmonics, including at least a plurality of even harmonics of said phase-shifted input signal, each even harmonics in said second set being twice a lower harmonics in the set, third means coupled to said first and second means for combining pairs of corresponding harmonics in the first and second sets to provide for each pair of corresponding even harmonics an output signal whose characteristics are a function of the phase difference between the reference and input signals and the even number of the harmonics pair, fourth means responsive to said first and second means for providing a pair of output signals whose characteristics are functions of the phase difference between the reference and input signals, and output means to which said output signals are supplied for providing a one-bit representation for each output signal as a function of the output signal characteristics.

Claim 9

An analog-to-digital converter comprising: input means for receiving an analog input signal; a source of a reference sinusoidal signal; and circuit means to which said input signal and said reference signal are applied for generating even-numbered harmonics for each signal, combining corresponding harmonics of the two signals and directly generating one bit representations for each corresponding combined harmonics, said one-bit representation defining a reflected binary code, said circuit means comprises first means responding to said reference signal for producing a first set including at least a plurality of numbered even harmonics of said reference signal, each even harmonics in said first set being twice a lower harmonics in the set, second means responding to said input signal, which is phase-shifted with respect to said first signal fOr providing a second set harmonics, including at least a plurality of even harmonics of said phase-shifted input signal, each even harmonics in said second set being twice a lower harmonics in the set, third means coupled to said first and second means for combining pairs of corresponding harmonics in the first and second sets to provide for each pair of corresponding even harmonics an output signal whose characteristics are a function of the phase difference between the reference and input signals and the even number of the harmonics pair, fourth means responsive to said first and second means for providing a pair of output signals whose characteristics are functions of the phase difference between the reference and input signals, and output means to which said output signals are supplied for providing a one-bit representation for each output signal as a function of the output signal characteristics.

Claim 10

The arrangement as recited in claim 7 wherein said third means further combine the fundamental harmonics of said first and second signals to provide first and second output signals which are functions of the cosine and sine of the phase difference respectively and each other output signal is expressable as V Rho , where V Rho 1/2 cos(2X psi ), psi is the phase difference and X log2 Rho , Rho being the even number of the corresponding harmonics pair which are combined by the third means to produce the output signal V Rho .

Claim 11

The arrangement as recited in claim 8 wherein said output means provide a representation of N+2 bits wherein N log2M, wherein M is the largest even harmonics produced by said first and second means.