Patent US3624533A successfully refreshed from Google Patents.
US3624533A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Differential preamplifier
Assignee: Individual
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Filing: 1969-07-08
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Granted: 1971-11-30
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Expires: 1989-07-08
Abstract
Abstract A differential preamplifier of the AC coupled type for measuring very small voltage differences between two input signals. The circuit employs an operational amplifier accepting the input signals at its inverted and noninverted input terminals, respectively. The first and second input signals being compared are applied to the inputs of respective field effect transistors which exhibit high-input impedance and low-output impedance. The field effect transistors are operated as current amplifiers yielding substantially unity voltage gain. Their outputs are connected through capacitive elements to the inverted and noninverted inputs, respectively, of the operational amplifier. The capacitors compensate for any constant or DC offset which may occur in the signal sources. Oppositely polarized semiconductor elements are connected in parallel across the input leads of the capacitors to severely limit overload voltage conditions. The low output impedances of the FET''s connected thereto are such that the relatively low impedance of the diodes which are operated in a forward biased mode just below their threshold voltage, has no effect upon the low-impedance signals appearing at the source electrodes of the FET''s so as to yield excellent common mode rejection characteristics. Diode clamps are provided to prevent overdrive and burn out of the FET''s. Adjustable resistors are provided for balancing the FET outputs and for nulling the offset voltage of the operational amplifier at 0 volts when the signals applied to the circuit input terminals are of equal value.
Inventors
- 👤 Peter Schiff
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 16:52
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/181; H03F3/183; H03F3/185; H03F3/1855; H03F2200/00; H03F2200/372
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
193 words
A differential amplifier for measuring voltage differences between a pair of input signals comprising: an operational amplifier having a pair of inputs for receiving said input signals and being adapted to generate an amplified signal at its output terminal which is representative of the difference in voltage levels of the input signals: first and second input terminals each adapted to receive an associated one of said input signals; first and second field effect transistors each having an input and an output; each of said transistor means inputs being connected to an associated one of said input terminals; first and second capacitor means each being coupled between the output of one of said transistor means and one input of said operational amplifier to isolate DC levels from said operational amplifier; first and second diode means being coupled in parallel between the outputs of said transistor means and being connected in opposing polarities to limit the differential voltage levels between said input signals which may be applied to the operational amplifier; adjustable means coupled across the outputs of both of said transistors for simultaneously compensating for any mismatch in the operating characteristics of said transistors.
Claim 2
Dependent Claim
193 words
A differential amplifier for measuring voltage differences between a pair of input signals comprising: an operational amplifier having a pair of inputs for receiving said input signals and being adapted to generate an amplified signal at its output terminal which is representative of the difference in voltage levels of the input signals: first and second input terminals each adapted to receive an associated one of said input signals; first and second field effect transistors each having an input and an output; each of said transistor means inputs being connected to an associated one of said input terminals; first and second capacitor means each being coupled between the output of one of said transistor means and one input of said operational amplifier to isolate DC levels from said operational amplifier; first and second diode means being coupled in parallel between the outputs of said transistor means and being connected in opposing polarities to limit the differential voltage levels between said input signals which may be applied to the operational amplifier; adjustable means coupled across the outputs of both of said transistors for simultaneously compensating for any mismatch in the operating characteristics of said transistors.
Claim 3
Dependent Claim
300 words
A differential amplifier for measuring voltage differences between a pair of input signals comprising; an operational amplifier having a pair of inputs for receiving said input signals and being adapted to generate an amplified signal at its output terminal which is representative of the difference in voltage levels of the input signals; first and second input terminals each adapted to receive an associated one of said input signals; first and second field effect transistors each having an input and an output; each of said transistor means inputs being connected to an associated one of said input terminals; first and second capacitor means each being coupled between the output of one of said transistor means and one input of said operational amplifier to isolate DC levels from said operational amplifier; first and second diode means being coupled in parallel between the outputs of said transistory means and being connected in opposing polarities to limit the differential voltage levels between said input signals which may be applied to the operational amplifier; each of said field effect transistors having a gate, a source and a grain electrode; said gate electrodes each being connected to said input terminals; a first bias source being connected in common to the drain electrodes of said field effect transistors; a second bias source; a potentiometer comprising a slider arm having first and second terminals and a resistor having first and second terminals; one terminal of said slider arm being connected to said second bias source; the second terminal of said slider arm lockingly engaging said resistor; said resistor first and second terminals being respectively connected to the source electrodes of said first and second field effect transistors; said slider arm being adjustable to adjust the loading of the transistors to compensate for any mismatch in transistor operating characteristics.
Claim 4
Dependent Claim
300 words
A differential amplifier for measuring voltage differences between a pair of input signals comprising; an operational amplifier having a pair of inputs for receiving said input signals and being adapted to generate an amplified signal at its output terminal which is representative of the difference in voltage levels of the input signals; first and second input terminals each adapted to receive an associated one of said input signals; first and second field effect transistors each having an input and an output; each of said transistor means inputs being connected to an associated one of said input terminals; first and second capacitor means each being coupled between the output of one of said transistor means and one input of said operational amplifier to isolate DC levels from said operational amplifier; first and second diode means being coupled in parallel between the outputs of said transistory means and being connected in opposing polarities to limit the differential voltage levels between said input signals which may be applied to the operational amplifier; each of said field effect transistors having a gate, a source and a grain electrode; said gate electrodes each being connected to said input terminals; a first bias source being connected in common to the drain electrodes of said field effect transistors; a second bias source; a potentiometer comprising a slider arm having first and second terminals and a resistor having first and second terminals; one terminal of said slider arm being connected to said second bias source; the second terminal of said slider arm lockingly engaging said resistor; said resistor first and second terminals being respectively connected to the source electrodes of said first and second field effect transistors; said slider arm being adjustable to adjust the loading of the transistors to compensate for any mismatch in transistor operating characteristics.
Claim 5
Dependent Claim
43 words
The device of claim 2 further comprising first and second clamping diodes each being connected between the gate electrode of an associated transistor and said second bias source for limiting the value of overload voltage which may be applied to the gate electrodes.
Claim 6
Dependent Claim
45 words
The device of claim 2 further comprising a clamping diode connected across the source and drain electrodes of one of said field effect transistors for limiting the value of overload voltages appearing across the source and drain electrodes of both of said field effect transistors.
Claim 7
Dependent Claim
24 words
The device of claim 1 further comprising a feedback path including a resistor connected between the output and inverted input of said operational amplifier.
Claim 8
Dependent Claim
48 words
The device of claim 2 further comprising: an adjustable resistance means having first and second terminals connected between said first and second bias sources and a third terminal connected to the noninverting input of said operational amplifier for adjusting the offset voltage of the operation amplifier to zero.
Claim 9
Dependent Claim
115 words
The device of claim 2 further comprising: a first resistor element having a first terminal connected to circuit ground; a reference input terminal connected to the remaining terminal of said resistor element; second and third resistors each having a first terminal connected in common to said reference input terminal and having their remaining terminals respectively connected to the gate electrodes of said first and second field effect transistors; fourth and fifth resistor elements each being connected between one of said input terminals and one of said gate electrodes; said first resistor element being adapted to divert any voltage differential between said reference input terminal and said circuit ground from said fourth and fifth resistor elements.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-29 | 1975-05-31 | 1975-11-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-29 | 1979-05-31 | 1979-11-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-29 | 1983-05-31 | 1983-11-30 | $7700.00 | Window Closed / Lapsed |