Patent US3624426A successfully refreshed from Google Patents.
US3624426A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current source for semiconductor circuits
Assignee: AT&T Inc
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Filing: 1970-10-05
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Granted: 1971-11-30
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Expires: 1990-10-05
Abstract
Abstract A positive current source for use in NPN majority monolithic integrated circuit technology has PNP transistors with low gains. A constant current is generated by connecting the bases and emitters of two of these PNP transistors together. The current at the output collector of the first PNP transistor is controlled by using high-gain NPN transistors to divert the large base currents of these PNP transistors from the resistance in the collector of the second PNP transistor while coupling the voltage across this resistance to the bases of both PNP transistors.
Inventors
- 👤 Veikko Reynold Saari
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 11:13
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22; G05F3/222
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
36 words
A circuit as claimed in claim 1 in which said high-gain transistors are of the NPN type and said low-gain transistors are of the PNP type, thereby creating a source of positive current at the output.
Claim 2
Dependent Claim
25 words
A circuit as claimed in claim 1 in which the means for directing the emitter current of said first high-gain transistor is a second resistance.
Claim 3
Dependent Claim
107 words
A circuit as claimed in claim 1 in which the means for directing the emitter current of said first high-gain transistor is a negative current source comprising: a third NPN high-gain transistor having its collector connected to the emitter of said first high-gain transistor and its emitter connected to ground, a fourth NPN high-gain transistor having its collector connected to its base, its base connected to the base of said third NPN transistor, and its emitter connected to ground, and a collector resistance having one end connected to the base of said fourth NPN transistor and the other end to the collector of said second NPN transistor.
Claim 4
Dependent Claim
121 words
A circuit as claimed in claim 1 and further including a circuit between the first resistance and the reference potential having a second output terminal, said circuit comprising: a pair of high-gain transistors, one of said transistors having its collector and base connected to said first resistance, and its emitter connected to said reference potential, and the other of said transistors having its emitter connected to said reference potential, its base connected to the base of said one transistor and its collector connected to said second output terminal, thereby creating a dual source of current in which the current output of said second output terminal is locked to the current output of said first output terminal in a substantially fixed ratio.
Claim 5
Dependent Claim
71 words
A circuit as claimed in claim 5 in which the pair of high-gain transistors are of the NPN type, the low-gain transistors are of the PNP type, and the reference potential is negative, thereby creating a source of positive current at said first output terminal and a source of negative current at said second output terminal which is locked in a substantially fixed ratio to the current at said first terminal.
References Cited (Backward Citations)
US3457493A
Cited
US3509364A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-29 | 1975-05-31 | 1975-11-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-29 | 1979-05-31 | 1979-11-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-29 | 1983-05-31 | 1983-11-30 | $7700.00 | Window Closed / Lapsed |