High-voltage power amplifier circuit

Claim 2

An amplifier circuit comprising: a load terminal; a first power terminal connectable to a first predetermined voltage source; a plurality of transistors each having a pair of main current carrying electrodes and a base control electrode, said main current carrying electrodes of said transistors being coupled in a series current path between said load terminal and said first power terminal; a plurality of intermediate power terminals coupled respectively to the junction points between the main current carrying electrodes of said transistors, said intermediate power terminals being connectable in succession from said first power terminal to voltage sources having predetermined magnitudes incrementally decreasing from said first predetermined voltage source; asymmetrically conducting means coupled between each of said intermediate power terminals and the corresponding one of said junction points between the main current carrying electrodes of said transistors, each of said asymmetrically conducting means being nonconductive when the voltage at the corresponding junction point exceeds the voltage at the corresponding power terminal; means coupled to the base control electrodes of said plurality of transistors for applying an input signal to said base control electrodes, said signal-applying means including voltage divider means connectable between a source of bias potential and a reference potential, said voltage divider means having a plurality of tap points coupled respectively to the control inputs of said transistors, thereby to cause said transistors to respond to input signals above predetermined incrementally related threshold levels associated respectively with said transistors; means coupled to said transistors for biasing each of said transistors to conduct an idling current when input signals are below the predetermined signal threshold level associated with each transistor, and to conduct in an active mode in response to input signals above the associated one of said predetermined signal threshold levels, said biasing means including: impedance means coupled between one main current carrying electrode and the base control electrode of each of said plurality of transistors; and asymmetrically conducting means connected between the base control electrode of each of said transistors and said voltage divider means, said last named asymmetrically conducting means being poled to protect its corresponding transistor from reverse voltage breakdown; thereby to activate said transistors in sequence without crossover distortion as the input signal increases in magnitude.

Claim 3

The amplifier circuit of claim 1, said signal-applying means including an input terminal coupled to a predetermined one of said tap points for receiving an input signal.

Claim 4

The amplifier circuit of claim 1, said voltage divider means including a plurality of zener diodes connected respectively between successive ones of said tap points.

Claim 5

In an amplifier circuit including a common output terminal connected to a load and two symmetrically configured transistor circuits adapted for push-pull operation to apply bipolar output signals to said common terminal in response to bipolar input signals, the improvement wherein each of said two transistor circuits comprises: a first power terminal coupled to a power source having a first predetermined voltage magnitude; a first transistor having a base conTrol electrode, and a pair of main current carrying electrodes coupled respectively to said first power terminal and said common output terminal; a second power terminal coupled to a power source having a second predetermined voltage magnitude larger than said first predetermined voltage magnitude; a second transistor having a base control electrode, and a pair of main current carrying electrodes coupled respectively to said second power terminal and the main current carrying electrode of said first transistor that is coupled to said first power terminal; an asymmetrically conducting element in series with the coupling between said first power terminal and the associated main current carrying electrodes of said first and second transistors, said asymmetrically conducting element being reverse biased when the voltage at said associated main current carrying electrodes exceeds in magnitude the voltage applied to said first power terminal; means for biasing said first and second transistors respectively in amplifying and substantially nonconducting modes when the amplified output signal levels produced are less than the voltage magnitude applied to said first power terminal, and for biasing said first and second transistors respectively in voltage limited and amplifying modes when the output signal levels produced are between the voltage magnitudes applied to said first and second power terminals, said biasing means including: asymmetrically conducting means coupled in series with the particular one of the main current carrying electrodes of said second transistor that is coupled to said first power terminal, said asymmetrically conducting means being poled to protect said second transistor from reverse-voltage breakdown when said second transistor is in a nonconducting mode; and means for coupling said particular one of the main current carrying electrodes of said second transistor to a potential source to cause an idling current to be conducted through said second transistor when it is in said substantially nonconducting mode, thereby preventing crossover distortion when signal amplification transfers between said first and second transistors.

Claim 6

In an amplifier circuit including a common output terminal connected to a load and two symmetrically configured transistor circuits adapted for push-pull operation to apply bipolar output signals to said common terminal in response to bipolar input signals, the improvement wherein each of said two transistor circuits comprises: a first power terminal coupled to a power source having a first predetermined voltage magnitude; a first transistor having a base conTrol electrode, and a pair of main current carrying electrodes coupled respectively to said first power terminal and said common output terminal; a second power terminal coupled to a power source having a second predetermined voltage magnitude larger than said first predetermined voltage magnitude; a second transistor having a base control electrode, and a pair of main current carrying electrodes coupled respectively to said second power terminal and the main current carrying electrode of said first transistor that is coupled to said first power terminal; an asymmetrically conducting element in series with the coupling between said first power terminal and the associated main current carrying electrodes of said first and second transistors, said asymmetrically conducting element being reverse biased when the voltage at said associated main current carrying electrodes exceeds in magnitude the voltage applied to said first power terminal; means for biasing said first and second transistors respectively in amplifying and substantially nonconducting modes when the amplified output signal levels produced are less than the voltage magnitude applied to said first power terminal, and for biasing said first and second transistors respectively in voltage limited and amplifying modes when the output signal levels produced are between the voltage magnitudes applied to said first and second power terminals, said biasing means including: asymmetrically conducting means coupled in series with the particular one of the main current carrying electrodes of said second transistor that is coupled to said first power terminal, said asymmetrically conducting means being poled to protect said second transistor from reverse-voltage breakdown when said second transistor is in a nonconducting mode; and means for coupling said particular one of the main current carrying electrodes of said second transistor to a potential source to cause an idling current to be conducted through said second transistor when it is in said substantially nonconducting mode, thereby preventing crossover distortion when signal amplification transfers between said first and second transistors.

Claim 7

The amplifier circuit of claim 4, further including means for applying said input signals to said amplifier circuit comprising: two end terminals connectable respectively to a source of input signals and a source of bias voltage; at least two asymmetrically conducting elements coupled in series between said two end terminals; and means for coupling the base control electrodes of said first and second transistors to selected electrodes of said two asymmetrically conducting elements.

Claim 8

The amplifier circuit of claim 5, wherein at least one of said two asymmetrically conducting elements is a zener diode.

Claim 9

The amplifier of claim 4, wherein said first and second transistors are of like conductivity type and the transistors of said two symmetrically configured transistor circuits are of complementary conductivity type.