Patent US3622883A successfully refreshed from Google Patents.
US3622883A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulsed current transistor beta tester having feedback to maintain emitter to collector current constant
Assignee: International Business Machines Corp
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Filing: 1969-07-24
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Granted: 1971-11-23
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Expires: 1989-07-24
Abstract
Abstract A test circuit for measuring forward current gain of a transistor comprising: A PLURALITY OF OUTPUT TEST TERMINALS FOR CONNECTION TO THE COLLECTOR, EMITTER AND BASE OF SAID TRANSISTOR; A FIRST, DRIVE, AMPLIFIER HAVING INPUT AND OUTPUT TERMINAL; A RESISTOR CONNECTED IN SERIES BETWEEN THE OUTPUT OF SAID FIRST AMPLIFIER AND A FIRST OF SAID TEST TERMINALS; A FIRST REFERENCED POTENTIAL CONNECTED TO A FIRST INPUT OF SAID FIRST AMPLIFIER; A SECOND OF SAID TEST TERMINALS CONNECTED TO A SECOND INPUT OF SAID FIRST AMPLIFIER; A CONSTANT CURRENT GENERATOR HAVING AT LEAST TWO OUTPUT TERMINALS WITH ONE GENERATOR OUTPUT TERMINAL CONNECTED TO THE SAID SECOND TEST TERMINAL AND WITH A SECOND GENERATOR OUTPUT TERMINAL CONNECTED TO A THIRD OF SAID TEST TERMINALS, WITH SAID SECOND AND THIRD TEST TERMINALS BEING ADAPTED FOR CONNECTION ACROSS THE EMITTER AND COLLECTOR OF SAID TRANSISTOR, AND WITH SAID FIRST TEST TERMINAL BEING ADAPTED FOR CONNECTION TO THE BASE OF SAID TRANSISTOR; A FEEDBACK PATH COUPLED FROM THE SAID FIRST TEST TERMINAL TO SAID SECOND TEST TERMINAL AND COMPRISING: A SECOND DIFFERENTIAL, AMPLIFIER HAVING INPUTS CONNECTED ACROSS SAID RESISTOR; AND MEANS INCLUDING A THIRD INVERTING, AMPLIFIER HAVING THE OUTPUT THEREOF CONNECTED TO THE OUTPUT OF SAID SECOND AMPLIFIER, AND WITH AN INPUT OF SAID THIRD AMPLIFIER CONNECTED TO SAID SECOND TEST TERMINAL FOR APPLYING A FEEDBACK SIGNAL TO SAID SECOND TEST TERMINAL.
Inventors
- 👤 Kenneth E Haire
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:07
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/26; G01R31/2607; G01R31/2608; G01R31/2614
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
227 words
A test circuit for measuring forward current gain of a transistor comprising: a plurality of output test terminals for connection to the collector, emitter and base of said transistor; a first, drive, amplifier having input and output terminals; a resistor connected in series between the output of said first amplifier and a first of said test terminals; a first referenced potential connected to a second input of said first amplifier; a second of said test terminals connected to a second input of said first amplifier; a constant current generator having at least two output terminals with one generator output terminal connected to the said second test terminal and with a second generator output terminal connected to a third of said test terminals, with said second and third test terminals being adapted for connection across the emitter and collector of said transistor, and with said first test terminal being adapted for connection to the base of said transistor; a feedback path coupled from the said first test terminal to said second test terminal and comprising: a second differential, amplifier having inputs connected across said resistor; and means including a third inverting, amplifier having the output thereof connected to the output of said second amplifier, and with an input of said third amplifier connected to said second test terminal for applying a feedback signal to said second test terminal.
Claim 2
Dependent Claim
227 words
A test circuit for measuring forward current gain of a transistor comprising: a plurality of output test terminals for connection to the collector, emitter and base of said transistor; a first, drive, amplifier having input and output terminals; a resistor connected in series between the output of said first amplifier and a first of said test terminals; a first referenced potential connected to a second input of said first amplifier; a second of said test terminals connected to a second input of said first amplifier; a constant current generator having at least two output terminals with one generator output terminal connected to the said second test terminal and with a second generator output terminal connected to a third of said test terminals, with said second and third test terminals being adapted for connection across the emitter and collector of said transistor, and with said first test terminal being adapted for connection to the base of said transistor; a feedback path coupled from the said first test terminal to said second test terminal and comprising: a second differential, amplifier having inputs connected across said resistor; and means including a third inverting, amplifier having the output thereof connected to the output of said second amplifier, and with an input of said third amplifier connected to said second test terminal for applying a feedback signal to said second test terminal.
Claim 3
Dependent Claim
17 words
The test circuit of claim 1 wherein said generator is adapted to operate in the pulsed mode.
Claim 4
Dependent Claim
46 words
The test circuit of claim 1 whErein said feedback path includes a fourth, summing, amplifier with the output of said fourth amplifier connected to said second test terminal and with an input of said fourth amplifier connected to the outputs of said second and third amplifiers.
Claim 5
Dependent Claim
17 words
The test circuit of claim 3 wherein said generator is adapted to operate in the pulsed mode.
Claim 6
Dependent Claim
223 words
A test circuit for measuring current gain of a transistor comprising: a constant current pulse generator; a plurality of output test terminals with a first and a second of said test terminals connected across the input and output path of said constant current pulse generator; means grounding said first test terminal; a drive amplifier having a first input thereof connected to said second test terminal; a constant voltage source connected between ground and a second input of said drive amplifier; a resistor connected between the output of said drive amplifier and a third of said test terminals with said third test terminal adapted for connection to the base of said transistor, and said first and second test terminals adapted for connections across the collector and emitter of said transistor; a differential amplifier having inputs thereof connected across said resistor; a summing amplifier having a first grounded input and a second input connected to the output of said differential amplifier and responsive thereto; circuit means connecting the output of said summing amplifier to said second test terminal; an inverting amplifier having a first grounded input and a second input connected to said second test terminal; circuit means connecting the output of said inverting amplifier to the said second input of said summing amplifier; and voltage measuring means for measuring voltage drop across said resistor.
Claim 7
Dependent Claim
223 words
A test circuit for measuring current gain of a transistor comprising: a constant current pulse generator; a plurality of output test terminals with a first and a second of said test terminals connected across the input and output path of said constant current pulse generator; means grounding said first test terminal; a drive amplifier having a first input thereof connected to said second test terminal; a constant voltage source connected between ground and a second input of said drive amplifier; a resistor connected between the output of said drive amplifier and a third of said test terminals with said third test terminal adapted for connection to the base of said transistor, and said first and second test terminals adapted for connections across the collector and emitter of said transistor; a differential amplifier having inputs thereof connected across said resistor; a summing amplifier having a first grounded input and a second input connected to the output of said differential amplifier and responsive thereto; circuit means connecting the output of said summing amplifier to said second test terminal; an inverting amplifier having a first grounded input and a second input connected to said second test terminal; circuit means connecting the output of said inverting amplifier to the said second input of said summing amplifier; and voltage measuring means for measuring voltage drop across said resistor.
Claim 8
Dependent Claim
19 words
The test circuit of claim 5 wherein said voltage means is responsive to the output of said differential amplifier.
Claim 9
Dependent Claim
217 words
A constant current test circuit for measuring the HFE current gain of a transistor comprising: a constant current pulse generator; emitter, collector and base mounting means for operatively connecting, respectively, the emitter, collector and base electrodes of said transistor in said circuit; means grounding said collector mounting means; circuit means connecting the said emitter and collector mounting means to the output path of said pulse generator; a drive amplifier having a first input thereof connected to said emitter mounting means; a constant voltage source connected between ground and a second input of said drive amplifier; a resistor having a predetermined resistance connected between the base mounting means and the output of said drive amplifier; a differential amplifier having the inputs thereof connected across said resistor; a summing amplifier having a first grounded input and a second input connected to the output of said differential amplifier and responsive thereto; a second resistor having said predetermined resistance connected between said emitter mounting means and the output of said summing amplifier; an inverting amplifier having a first grounded input and a second input connected to said emitter mounting means; means connecting the output of said inverting amplifier to the said second input of said summing amplifier; and voltage measuring means for measuring the voltage drop across the first said resistor.
Claim 10
Dependent Claim
217 words
A constant current test circuit for measuring the HFE current gain of a transistor comprising: a constant current pulse generator; emitter, collector and base mounting means for operatively connecting, respectively, the emitter, collector and base electrodes of said transistor in said circuit; means grounding said collector mounting means; circuit means connecting the said emitter and collector mounting means to the output path of said pulse generator; a drive amplifier having a first input thereof connected to said emitter mounting means; a constant voltage source connected between ground and a second input of said drive amplifier; a resistor having a predetermined resistance connected between the base mounting means and the output of said drive amplifier; a differential amplifier having the inputs thereof connected across said resistor; a summing amplifier having a first grounded input and a second input connected to the output of said differential amplifier and responsive thereto; a second resistor having said predetermined resistance connected between said emitter mounting means and the output of said summing amplifier; an inverting amplifier having a first grounded input and a second input connected to said emitter mounting means; means connecting the output of said inverting amplifier to the said second input of said summing amplifier; and voltage measuring means for measuring the voltage drop across the first said resistor.
Claim 11
Dependent Claim
20 words
The test circuit of claim 7 wherein said voltage measuring means is responsive to the output of said differential amplifier.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-22 | 1975-05-24 | 1975-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-22 | 1979-05-24 | 1979-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-22 | 1983-05-24 | 1983-11-23 | $7700.00 | Window Closed / Lapsed |