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Process for forming semiconductor devices with polycrystalline diffusion pathways and devices formed thereby

Assignee: International Business Machines Corp
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Filing: 1970-01-28
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Granted: 1971-11-16
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Expires: 1990-01-28
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Abstract

Abstract A process wherein epitaxial silicon is grown on a substrate of single-crystal silicon with islands of silicon dioxide thereon, whereby single crystal epitaxial material is grown over the single-crystal substrate areas, but polycrystalline silicon is grown over the silicon dioxide islands. Since impurity diffusion occurs more rapidly through polycrystalline material than through single-crystalline material diffusion schemes can be obtained using the rapid diffusion pathway provided by the polycrystalline material to provide subsurface configurations which are completely enclosed by single-crystal material, for instance, a buried subcollector can be formed by growing polycrystalline silicon material horizontally, extending a narrow polycrystalline channel upward to the device surface, and subsequently diffusing impurities down through the narrow vertical polycrystalline channel into the lateral polycrystalline subcollector. Further, an electrical underpass can be formed which has a very low resistance by again using the rapid diffusion characteristics of polycrystalline silicon to grow polycrystalline silicon of the desired shape which can be rapidly diffused to provide, in comparison to background, a high conductivity path. By control of the substrate crystalline orientation, polycrystalline material can be grown which terminates because of sidewall convergence. This is desirable where it is required to terminate polycrystalline growth and begin single-crystal growth without any alteration in process conditions. The devices described are also claimed.

Inventors

  • 👤 Joseph J Chang
  • 👤 Madhukar B Vora

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 18:47
CPC Classifications
H; H10; H10P; H10P95/00; H10D; H10D99/00; H10W; H10W20/00; H10W20/01; H10W20/021; H10W20/20; Y; Y10; Y10S; Y10S148/00; Y10S148/085; Y10S148/115; Y10S148/122; Y10S148/145

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 25 words
The semiconductor device defined in claim 1 wherein said first member comprises a plurality of extending portions joined at one end to said first portion.
Claim 2
Dependent Claim 21 words
The semiconductor device defined in claim 1 wherein a film of silicon dioxide is between said first member and said substrate.
Claim 3
Dependent Claim 14 words
The semiconductor device defined in claim 1 wherein said current-carrying element comprises a transistor.
Claim 4
Dependent Claim 55 words
The semiconductor device defined in claim 1 and further including a third member of doped polycrystalline silicon extending through said epitaxial layer from a second portion of said first member to the surface of said epitaxial opposite said substrate, said third member having an impurity concentration at least of the order of about 1020 atoms/cc.
Claim 5
Dependent Claim 15 words
The semiconductor device defined in claim 1 wherein said current-carrying element comprises an electrical line.

References Cited (Backward Citations)

US3316130A Cited
US3475661A Cited
US3433684A Cited
DE1926884A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-11-15 1975-05-17 1975-11-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-11-15 1979-05-17 1979-11-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-11-15 1983-05-17 1983-11-16 $7700.00 Window Closed / Lapsed

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