Patent US3619664A successfully refreshed from Google Patents.
US3619664A
Expired / Lapsed
US
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Monostable multivibrator circuit employing a feed forward circuit
Assignee: GTE Sylvania Inc
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Filing: 1969-11-04
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Granted: 1971-11-09
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Expires: 1989-11-04
Abstract
Abstract An improved monostable circuit employs a first gating circuit which, in response to an input trigger signal, activates the timing cycle of a timing circuit. A buffer output circuit supplies a second input signal to the first gating circuit to render the monostable circuit nonresponsive to another input trigger circuit until the timing circuit has completed the timing cycle. A feed forward circuit is connected between the output of the first gating circuit and the buffer output circuit to prevent false triggering of the monostable circuit due to noise signals on the circuit power supplies.
Inventors
- 👤 Albert H Ashley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 18:05
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/04; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/284
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
322 words
An improved monostable circuit comprising: an output terminal; first gating means having first and second input connections and an output connection and being operative to change the signal level at the output connection from a first predetermined signal level to a second predetermined signal level in response to third and fourth predetermined signal levels at said first and second input connections respectively; a timing circuit having an output connection and an input connection from the output connection of said first gating means and being operative to determine the delay time of said improved monostable circuit; buffer output means having an output connection to the second input connection of said first gating means and to said output terminal, a first input connection connected to the output connection of said timing circuit, and a second input connection, said buffer output means being operative in response to fifth and sixth predetermined signal levels at its first and second input connections to generate a feedback signal to said first gating means, said feedback signal corresponding to said third predetermined signal level; driving means connected between said timing circuit and the first input connection of said buffer output means and being operative in response to a signal from said timing circuit to generate said fifth predetermined signal level at the first input connection of said buffer output means; and feed forward means connected between the common connection of said first gating means and said timing circuit and the second input connection of said buffer output means and being operative in response to the first predetermined signal level from said first gating means to inhibit said buffer output means and being operative in response to said second predetermined signal level to turn on said output buffer means, whereby said improved monostable circuit in response to a trigger signal at said first gating means generates an output signal pulse, the duration of which is determined by said timing circuit.
Claim 2
Dependent Claim
322 words
An improved monostable circuit comprising: an output terminal; first gating means having first and second input connections and an output connection and being operative to change the signal level at the output connection from a first predetermined signal level to a second predetermined signal level in response to third and fourth predetermined signal levels at said first and second input connections respectively; a timing circuit having an output connection and an input connection from the output connection of said first gating means and being operative to determine the delay time of said improved monostable circuit; buffer output means having an output connection to the second input connection of said first gating means and to said output terminal, a first input connection connected to the output connection of said timing circuit, and a second input connection, said buffer output means being operative in response to fifth and sixth predetermined signal levels at its first and second input connections to generate a feedback signal to said first gating means, said feedback signal corresponding to said third predetermined signal level; driving means connected between said timing circuit and the first input connection of said buffer output means and being operative in response to a signal from said timing circuit to generate said fifth predetermined signal level at the first input connection of said buffer output means; and feed forward means connected between the common connection of said first gating means and said timing circuit and the second input connection of said buffer output means and being operative in response to the first predetermined signal level from said first gating means to inhibit said buffer output means and being operative in response to said second predetermined signal level to turn on said output buffer means, whereby said improved monostable circuit in response to a trigger signal at said first gating means generates an output signal pulse, the duration of which is determined by said timing circuit.
Claim 3
Dependent Claim
73 words
An improved monostable circuit according to claim 1 wherein said timing circuit includes: a capacitor connected between the output connection of said first gating means and said driving means and being operative to store a voltage; and a resistor connected to the common connection of said capacitor and said driving means and cooperating with said capacitor to set the width of the output pulse at the output terminal of said improved monostable circuit.
Claim 4
Dependent Claim
119 words
An improved monostable circuit according to claim 1 wherein said buffer output means includes: a source of reference potential; first resistor having one end connected to a source of direct current energy; second resistor having one end connected to said feed forward means; and first transistor circuit means having its emitter connected to said source of reference potential, its collector connected to the other end of said second resistor and to said feed forward means and its base connected to the other end of said second resistor and to said driving means, said transistor means being operative to conduct in response to the fifth and sixth predetermined signal levels from said driving circuit and said feed forward means respectively.
Claim 5
Dependent Claim
190 words
An improved monostable ciRcuit according to claim 1 wherein said buffer output means includes: a third resistor having one end connected to a source of direct current energy; second gating means having a first input connection to said driving means and to the other end of said third resistor, a second input connection to said feed forward means, and an output connection to the output terminal of said improved monostable circuit and being operative in response to said fifth and sixth predetermined signal levels to produce an output signal at said output terminal; and third gating means having a first input connection to the first input connection of said second gating means, a second input connection to the second input connection of said second gating means and an output connection to the second input connection of said first gating means, said third gating means being operative in response to said fifth and sixth predetermined signal levels to direct the feedback signal to said first gating means whereby said first gating means is insensitive to additional third predetermined signal levels until the timing cycle of said timing circuit has been completed.
Claim 6
Dependent Claim
91 words
An improved monostable circuit according to claim 1 wherein said driving means includes: a source of reference potential; and second transistor circuit means having its emitter connected to said source of reference potential, its collector connected to the second input connection of said buffer output means and its base connected to the output connection of said timing circuit, said second transistor circuit means being operative in response to an output signal from said timing circuit to generate said fifth predetermined signal at the first input connection to said output buffer means.
Claim 7
Dependent Claim
67 words
An improved monostable circuit according to claim 1 including a second diode connected between the common connection of said first gating means and said feed forward means and said timing circuit means and being operative to isolate the input connection of said feed forward means from said timing circuit to thereby improve the fall time of the signal at the output terminal of said improved monostable circuit.
Claim 8
Dependent Claim
142 words
An improved monostable circuit according to claim 4 wherein said driving circuit means includes: a first diode having one end connected to the first input connection of said buffer output means and the other end connected to the output connection of said first gating means; a fourth resistor having one end connected to a source of direct current energy; and transistor means having its base connected to the other end of said first diode and to said timing circuit, its collector connected to said buffer output means, and its emitter connected to the common connection of the other end of said fourth resistor and said first gating means and being operative in response to a seventh predetermined signal level at its base to turn off said output buffer means and thereby terminate the signal at the output terminal of said monostable circuit.
Claim 9
Dependent Claim
119 words
An improved monostable circuit according to claim 2 wherein said buffer output means includes: a source of reference potential; first resistor having one end connected to a source of direct current energy; second resistor having one end connected to said feed forward means; and first transistor circuit means having its emitter connected to said source of reference potential, its collector connected to the other end of said second resistor and to said feed forward means and its base connected to the other end of said second resistor and to said driving means, said transistor means being operative to conduct in response to the fifth and sixth predetermined signal levels from said driving circuit and said feed forward means respectively.
Claim 10
Dependent Claim
186 words
An improved monostable circuit according to claim 2 wherein said buffer output means includes: a third resistor having one end connected to a source of direct current energy; second gating means Having a first input connection to said driving means and to the other end of said third resistor means, a second input connection to said feed forward means and an output connection to the output terminal of said improved monostable circuit and being operative in response to said fifth and sixth predetermined signal levels to produce an output signal; and third gating means having a first input connection to the first input connection of said second gating means, a second input connection to the second input connection of said second gating means and an output connection to the second input connection of said first gating means, said third gating means being operative in response to said fifth and sixth predetermined signal levels to direct an output signal to said first gating means whereby said first gating means is insensitive to additional third predetermined signals until the timing cycle of said timing circuit has been completed.
Claim 11
Dependent Claim
91 words
An improved monostable circuit according to claim 9 wherein said diving circuit includes: a source of reference potential; and second transistor circuit means having its emitter connected to said source of reference potential, its collector connected to the second input connection of said buffer output means and its base connected to the output connection of said timing circuit, said second transistor circuit means being operative in response to an output signal from said timing circuit to generate said fifth predetermined signal at the first input connection to said output buffer means.
Claim 12
Dependent Claim
67 words
An improved monostable circuit according to claim 10 including a second diode connected between the common connection of said first gating means and said feed forward means and said timing circuit means and being operative to isolate the input connection of said feed forward means from said timing circuit to thereby improve the fall time of the signal at the output terminal of said improved monostable circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-08 | 1975-05-10 | 1975-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-08 | 1979-05-10 | 1979-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-08 | 1983-05-10 | 1983-11-09 | $7700.00 | Window Closed / Lapsed |