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US3609477A
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Schottky-barrier field-effect transistor
Assignee: International Business Machines Corp
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Filing: 1968-04-11
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Granted: 1971-09-28
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Expires: 1988-04-11
Abstract
Abstract A Schottky-barrier field-effect transistor is disclosed with a semiconductor channel of relatively low conductivity between the source and drain electrodes which may be electrically influenced by a Schottky-barrier gate electrode located on the semiconductor channel. The transistor is characterized by a zone or region of higher conductivity which extends from the vicinity of the source electrode to near the gate electrode. Further, source and drain regions are conveniently provided for the transistor of semiconductor of the same conductivity type as the channel semiconductor at the Schottky-barrier electrode. Advantageously, the drain region may be made of semiconductor of high conductivity and the same conductivity type as the source region. The high conductivity region may be achieved through either diffusion or epitaxial growth technique.
Inventors
- 👤 Karsten E Drageid
- 👤 Theodor O Mohr
- 👤 Horst F Statz
- 👤 Waldemar Von Muench
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 12:59
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/87; H10D99/00; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/051; Y10S148/053; Y10S148/115; Y10S148/117; Y10S148/139
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
162 words
A Schottky-barrier transistor comprising: a substrate; a source having a relatively high-conductivity semiconductor region of a given conductivity type supported by said substrate and having a source electrode electrically connected thereto, said high-conductivity source region consisting of two layers of different conductivities; a drain having a drain region supported by said substrate and a drain electrode electrically connected thereto, said drain electrode being spaced from said source electrode, said drain region being spaced from said source region; an intermediate semiconductor region of said given conductivity type supported by said substrate located between said source and drain regions and having lower conductivity than either of said two layers of said source region, said intermediate semiconductor region extending over said high-conductivity source region; and a Schottky-barrier gate electrode located on said intermediate semiconductor region spaced from said source electrode and said drain electrode for electrically influencing said conductivity of said intermediate region; whereby the breakdown voltage between said gate and said drain is increased.
Claim 2
Dependent Claim
228 words
A Schottky-barrier transistor comprising: a substrate; a source having a relatively high-conductivity semiconductor region of a given conductivity type supported by said substrate and having a source electrode electrically connected thereto; a drain having a relatively high-conductivity semiconductor region of the same conductivity type of said source, said source semiconductor region supported by said substrate and having a drain electrode electrically connected thereto, said drain electrode being spaced from said source region; an intermediate semiconductor region of said given conductivity type supported by said substrate located between said source and drain electrodes and having lower conductivity than said source semiconductor region, said intermediate semiconductor being contiguous to and separating said substrate from said high-conductivity source and drain regions and extending between said high-conductivity source and drain regions and said high-conductivity drain and source regions being doped zones of said extended portions of said intermediate region; a Schottky-Barrier gate electrode located on said intermediate semiconductor region spaced from said source electrode and said drain electrode for electrically influencing said conductivity of said intermediate region; and insulating means located on said intermediate semiconductor region on spaces between said source and gate electrodes and between said drain and gate electrodes comprising, a first insulating layer between said high conductivity regions and said gate electrode, said first layer having an undergrown region, and a second insulating layer filling in said undergrown region.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-09-27 | 1975-03-29 | 1975-09-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-09-27 | 1979-03-29 | 1979-09-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-09-27 | 1983-03-29 | 1983-09-28 | $7700.00 | Window Closed / Lapsed |